!!!!    6    0    1  990203800  V6368                                         

! Device           : 74F547
! Function         : Octal Decoder/Demultiplexer,Address Latches and Acknowledge
! revision         : B.01.00
! safeguard        : standard_fttl
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

assign  VCC         to pins  20
assign  GND         to pins  10

assign  A20         to pins  17,7,6
assign  O70bar      to pins  11,9,8,18,19,1,2,12
assign  O_D0        to pins  12   !AT Added for minimum pin test.
assign  O_D1        to pins  2    !AT Added for minimum pin test.
assign  O_D2        to pins  1    !AT Added for minimum pin test.
assign  O_D3        to pins  19   !AT Added for minimum pin test.
assign  O_D4        to pins  18   !AT Added for minimum pin test.
assign  O_D5        to pins  8    !AT Added for minimum pin test.
assign  O_D6        to pins  9    !AT Added for minimum pin test.
assign  O_D7        to pins  11   !AT Added for minimum pin test.

assign  E1bar       to pins  15
assign  E32         to pins  13,14
assign  LE          to pins  16
assign  RDbar       to pins  5
assign  WRbar       to pins  4
assign  ACKbar      to pins  3
assign  WRDbar      to pins  4,5

!warning "Please confirm ACKbar is pulled up, <= 1k ohms."

family  TTL

power   VCC, GND

inputs  E1bar,E32,LE,RDbar,WRbar,A20,WRDbar

outputs ACKbar,O70bar
outputs O_D0, O_D1, O_D2, O_D3 !AT Added for minimum pin test.
outputs O_D4, O_D5, O_D6, O_D7 !AT Added for minimum pin test.

disable     ACKbar      with  E1bar       to    "1"
disable     ACKbar      with  E32         to    "00"
disable     ACKbar      with  E32         to    "01"
disable     ACKbar      with  E32         to    "10"
disable     ACKbar      with  WRDbar      to    "11"

when E1bar  is "1"  inactive ACKbar
when E32    is "00" inactive ACKbar
when E32    is "01" inactive ACKbar
when E32    is "10" inactive ACKbar
when WRDbar is "11"  inactive ACKbar

trace ACKbar, O70bar to E1bar,E32,LE,RDbar,WRbar,A20,WRDbar

set load on groups  ACKbar  to pull up

!*******************************************************************************
!*******************************************************************************

! Condition

vector   Initial_Set
      set   E1bar             to "1"
      set   E32               to "00"
      set   LE                to "1"
      set   RDbar             to "1"
      set   WRbar             to "1"
      set   A20               to "000"
end vector

vector   Keep_Control
      set   E1bar             to "k"
      set   E32               to "kk"
      set   LE                to "k"
      set   RDbar             to "k"
      set   WRbar             to "k"
      set   A20               to "kkk"
end vector

vector   Enable
      initialize to Keep_Control
      set   E1bar             to "0"
      set   E32               to "11"
end vector

! Control

vector   LE_true
      initialize to Keep_Control
      set   LE                to "1"
      set   E1bar             to "z"
end vector

vector   LE_false
      initialize to Keep_Control
      set   LE                to "0"
      set   E1bar             to "z"
end vector

vector   E1bar_true
      initialize to Keep_Control
      set   LE                to "z"
      set   E1bar             to "0"
end vector

vector   E1bar_false
      initialize to Keep_Control
      set   LE                to "z"
      set   E1bar             to "1"
end vector

vector   E32_true
      initialize to Keep_Control
      set   E32               to "11"
end vector

vector   E32_false_1
      initialize to Keep_Control
      set   E32               to "0z"
end vector

vector   E32_false_2
      initialize to Keep_Control
      set   E32               to "z0"
end vector

vector   RDbar_true
      initialize to Keep_Control
      set   RDbar             to "0"
end vector

vector   RDbar_false
      initialize to Keep_Control
      set   RDbar             to "1"
end vector

vector   WRbar_true
      initialize to Keep_Control
      set   WRbar             to "0"
end vector

vector   WRbar_false
      initialize to Keep_Control
      set   WRbar             to "1"
end vector

! Address

vector   A_1
      initialize to Keep_Control
      set   A20               to "001"
end vector

vector   A_2
      initialize to Keep_Control
      set   A20               to "010"
end vector

vector   A_3
      initialize to Keep_Control
      set   A20               to "011"
end vector

vector   A_4
      initialize to Keep_Control
      set   A20               to "100"
end vector

vector   A_5
      initialize to Keep_Control
      set   A20               to "101"
end vector

vector   A_6
      initialize to Keep_Control
      set   A20               to "110"
end vector

vector   A_7
      initialize to Keep_Control
      set   A20               to "111"
end vector



! Status

vector   ACKbar_true
      initialize to Keep_Control
      set   ACKbar            to "0"
end vector

vector   ACKbar_false
      initialize to Keep_Control
      set   ACKbar            to "1"
end vector

vector   O70_11111111
      initialize to Keep_Control
      set   O70bar            to "11111111"
end vector

vector   O70_11111110
      initialize to Keep_Control
      set   O70bar            to "11111110"
end vector

vector   O70_11111101
      initialize to Keep_Control
      set   O70bar            to "11111101"
end vector

vector   O70_11111011
      initialize to Keep_Control
      set   O70bar            to "11111011"
end vector

vector   O70_11110111
      initialize to Keep_Control
      set   O70bar            to "11110111"
end vector

vector   O70_11101111
      initialize to Keep_Control
      set   O70bar            to "11101111"
end vector

vector   O70_11011111
      initialize to Keep_Control
      set   O70bar            to "11011111"
end vector

vector   O70_10111111
      initialize to Keep_Control
      set   O70bar            to "10111111"
end vector

vector   O70_01111111
      initialize to Keep_Control
      set   O70bar            to "01111111"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector   O_D0_0
      initialize to Keep_Control
      set   O_D0              to "0"
end vector

vector   O_D0_1
      initialize to Keep_Control
      set   O_D0              to "1"
end vector

vector   O_D1_0
      initialize to Keep_Control
      set   O_D1              to "0"
end vector

vector   O_D1_1
      initialize to Keep_Control
      set   O_D1              to "1"
end vector

vector   O_D2_0
      initialize to Keep_Control
      set   O_D2              to "0"
end vector

vector   O_D2_1
      initialize to Keep_Control
      set   O_D2              to "1"
end vector

vector   O_D3_0
      initialize to Keep_Control
      set   O_D3              to "0"
end vector

vector   O_D3_1
      initialize to Keep_Control
      set   O_D3              to "1"
end vector

vector   O_D4_0
      initialize to Keep_Control
      set   O_D4              to "0"
end vector

vector   O_D4_1
      initialize to Keep_Control
      set   O_D4              to "1"
end vector

vector   O_D5_0
      initialize to Keep_Control
      set   O_D5              to "0"
end vector

vector   O_D5_1
      initialize to Keep_Control
      set   O_D5              to "1"
end vector

vector   O_D6_0
      initialize to Keep_Control
      set   O_D6              to "0"
end vector

vector   O_D6_1
      initialize to Keep_Control
      set   O_D6              to "1"
end vector

vector   O_D7_0
      initialize to Keep_Control
      set   O_D7              to "0"
end vector

vector   O_D7_1
      initialize to Keep_Control
      set   O_D7              to "1"
end vector


!*******************************************************************************
!*******************************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit "awaretest D0 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  O_D0_1
      execute  E32_true
      execute  O_D0_0
end unit

unit "awaretest D1 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  O_D1_1
      execute  A_1
      execute  O_D1_0
end unit

unit "awaretest D2 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  A_1
      execute  O_D2_1
      execute  A_2
      execute  O_D2_0
end unit

unit "awaretest D3 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  A_2
      execute  O_D3_1
      execute  A_3
      execute  O_D3_0
end unit

unit "awaretest D4 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  A_3
      execute  O_D4_1
      execute  A_4
      execute  O_D4_0
end unit

unit "awaretest D5 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  A_4
      execute  O_D5_1
      execute  A_5
      execute  O_D5_0
end unit

unit "awaretest D6 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  A_5
      execute  O_D6_1
      execute  A_6
      execute  O_D6_0
end unit

unit "awaretest D7 Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  E32_true
      execute  A_6
      execute  O_D7_1
      execute  A_7
      execute  O_D7_0
end unit

unit     "Address Test"
      execute  Initial_Set
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  O70_11111111
      execute  E32_true
      execute  O70_11111110
      execute  E1bar_false
      execute  E32_false_1
      execute  A_1
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_11111101
      execute  E1bar_false
      execute  E32_false_2
      execute  A_2
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_11111011
      execute  E1bar_false
      execute  E32_false_1
      execute  A_3
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_11110111
      execute  E1bar_false
      execute  E32_false_2
      execute  A_4
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_11101111
      execute  E1bar_false
      execute  E32_false_1
      execute  A_5
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_11011111
      execute  E1bar_false
      execute  E32_false_2
      execute  A_6
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_10111111
      execute  E1bar_false
      execute  E32_false_1
      execute  A_7
      execute  LE_true
      execute  LE_false
      execute  E1bar_true
      execute  E32_true
      execute  O70_01111111
      execute  E1bar_false
      execute  E32_false_2
end unit

unit     "Transparent Test"
      execute  Initial_Set
      execute  LE_true
      execute  E1bar_true
      execute  O70_11111111
      execute  E32_true
      execute  O70_11111110
      execute  A_1
      execute  O70_11111101
      execute  A_2
      execute  O70_11111011
      execute  A_3
      execute  O70_11110111
      execute  A_4
      execute  O70_11101111
      execute  A_5
      execute  O70_11011111
      execute  E32_false_1
      execute  O70_11111111
      execute  E32_true
      execute  A_6
      execute  O70_10111111
      execute  E32_false_2
      execute  O70_11111111
      execute  E32_true
      execute  A_7
      execute  O70_01111111
      execute  LE_false
      execute  A_6
      execute  O70_01111111
end unit

unit     "Acknowledge Test"
      execute  Initial_Set
      execute  ACKbar_false
      execute  E1bar_true
      execute  ACKbar_false
      execute  E32_true
      execute  ACKbar_false
      execute  RDbar_true
      execute  ACKbar_true
      execute  RDbar_false
      execute  ACKbar_false
      execute  WRbar_true
      execute  ACKbar_true
      execute  E1bar_false
      execute  ACKbar_false
end unit


! End of Test