!!!!    6    0    1  974785937  V2eb2                                         

! Device           : 74f657
! Function         : Octal Bidirectional transceiver with Parity Generator
! revision         : B.01.00
! safeguard        : standard_fttl
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

combinatorial

vector cycle       500n
receive delay      400n

assign   VCC               to pins   7
assign   GND               to pins  18, 19

assign   TR_bar            to pins   1
assign   Output_enable_bar to pins  24
assign   Even_Odd          to pins  11

assign   A_Bus             to pins  10,  9,  8,  6,  5,  4,  3,  2
assign   B_Bus             to pins  14, 15, 16, 17, 20, 21, 22, 23

assign   A0                to pins   2
assign   A1                to pins   3
assign   A2                to pins   4
assign   A3                to pins   5
assign   A4                to pins   6
assign   A5                to pins   8
assign   A6                to pins   9
assign   A7                to pins  10

assign   B0                to pins  23
assign   B1                to pins  22
assign   B2                to pins  21
assign   B3                to pins  20
assign   B4                to pins  17
assign   B5                to pins  16
assign   B6                to pins  15
assign   B7                to pins  14

assign   Error_bar         to pins  12
assign   Parity            to pins  13

power    Vcc, GND

family   TTL

inputs   TR_bar, Output_enable_bar, Even_Odd

outputs  Error_bar

bidirectional  A_Bus, B_Bus, Parity
bidirectional  A0, A1, A2, A3, A4, A5, A6, A7
bidirectional  B0, B1, B2, B3, B4, B5, B6, B7

set load on groups A_Bus to pull up !!For HP3070 only
set load on groups B_Bus to pull up !!For HP3070 only

warning  "Pull up is required on Pins 2 & 23 for HP3065 to test tri-state state"

disable  A_Bus with  Output_Enable_Bar    to "1"
disable  B_Bus with  Output_Enable_Bar    to "1"
disable  Parity with Output_Enable_Bar    to "1"
disable  Error_bar with Output_Enable_Bar to "1"

when  Output_Enable_Bar is "1"   inactive A_Bus
when  Output_Enable_Bar is "1"   inactive B_Bus
when  Output_Enable_Bar is "1"   inactive Parity

when  TR_Bar            is "1"   inputs   A_Bus
when  TR_Bar            is "1"   outputs  B_Bus
when  TR_Bar            is "0"   outputs  A_Bus
when  TR_Bar            is "0"   inputs   B_Bus

trace Parity   to A_Bus, B_Bus, TR_Bar, Output_Enable_Bar, Even_Odd
trace A_Bus    to B_Bus, TR_Bar, Output_Enable_Bar, Even_Odd
trace B_Bus    to A_Bus, TR_Bar, Output_Enable_Bar, Even_Odd

!
!-----------------------------------------------------------------------
!

vector  Enable_A_to_B
   set   Even_Odd          to "0"
   set   TR_bar            to "1"
   set   Output_enable_bar to "0"
end vector

vector  Enable_B_to_A
   set   Even_Odd          to "0"
   set   TR_bar            to "0"
   set   Output_enable_bar to "0"
end vector

vector  Test_A0_Low
   initialize              to Enable_A_to_B
   drive A0
   receive  B0
   set   A0                to "0"
   set   B0                to "0"
end vector

vector  Test_A0_High
   initialize              to Enable_A_to_B
   drive A0
   receive  B0
   set   A0                to "1"
   set   B0                to "1"
end vector

vector  Test_A1_Low
   initialize              to Enable_A_to_B
   drive A1
   receive  B1
   set   A1                to "0"
   set   B1                to "0"
end vector

vector  Test_A1_High
   initialize              to Enable_A_to_B
   drive A1
   receive  B1
   set   A1                to "1"
   set   B1                to "1"
end vector

vector  Test_A2_Low
   initialize              to Enable_A_to_B
   drive A2
   receive  B2
   set   A2                to "0"
   set   B2                to "0"
end vector

vector  Test_A2_High
   initialize              to Enable_A_to_B
   drive A2
   receive  B2
   set   A2                to "1"
   set   B2                to "1"
end vector

vector  Test_A3_Low
   initialize              to Enable_A_to_B
   drive A3
   receive  B3
   set   A3                to "0"
   set   B3                to "0"
end vector

vector  Test_A3_High
   initialize              to Enable_A_to_B
   drive A3
   receive  B3
   set   A3                to "1"
   set   B3                to "1"
end vector

vector  Test_A4_Low
   initialize              to Enable_A_to_B
   drive A4
   receive  B4
   set   A4                to "0"
   set   B4                to "0"
end vector

vector  Test_A4_High
   initialize              to Enable_A_to_B
   drive A4
   receive  B4
   set   A4                to "1"
   set   B4                to "1"
end vector

vector  Test_A5_Low
   initialize              to Enable_A_to_B
   drive A5
   receive  B5
   set   A5                to "0"
   set   B5                to "0"
end vector

vector  Test_A5_High
   initialize              to Enable_A_to_B
   drive A5
   receive  B5
   set   A5                to "1"
   set   B5                to "1"
end vector

vector  Test_A6_Low
   initialize              to Enable_A_to_B
   drive A6
   receive  B6
   set   A6                to "0"
   set   B6                to "0"
end vector

vector  Test_A6_High
   initialize              to Enable_A_to_B
   drive A6
   receive  B6
   set   A6                to "1"
   set   B6                to "1"
end vector

vector  Test_A7_Low
   initialize              to Enable_A_to_B
   drive A7
   receive  B7
   set   A7                to "0"
   set   B7                to "0"
end vector

vector  Test_A7_High
   initialize              to Enable_A_to_B
   drive A7
   receive  B7
   set   A7                to "1"
   set   B7                to "1"
end vector

vector  Test_B0_Low
   initialize              to Enable_B_to_A
   drive B0
   receive  A0
   set   B0                to "0"
   set   A0                to "0"
end vector

vector  Test_B0_High
   initialize              to Enable_B_to_A
   drive B0
   receive  A0
   set   B0                to "1"
   set   A0                to "1"
end vector

vector  Test_B1_Low
   initialize              to Enable_B_to_A
   drive B1
   receive  A1
   set   B1                to "0"
   set   A1                to "0"
end vector

vector  Test_B1_High
   initialize              to Enable_B_to_A
   drive B1
   receive  A1
   set   B1                to "1"
   set   A1                to "1"
end vector

vector  Test_B2_Low
   initialize              to Enable_B_to_A
   drive B2
   receive  A2
   set   B2                to "0"
   set   A2                to "0"
end vector

vector  Test_B2_High
   initialize              to Enable_B_to_A
   drive B2
   receive  A2
   set   B2                to "1"
   set   A2                to "1"
end vector

vector  Test_B3_Low
   initialize              to Enable_B_to_A
   drive B3
   receive  A3
   set   B3                to "0"
   set   A3                to "0"
end vector

vector  Test_B3_High
   initialize              to Enable_B_to_A
   drive B3
   receive  A3
   set   B3                to "1"
   set   A3                to "1"
end vector

vector  Test_B4_Low
   initialize              to Enable_B_to_A
   drive B4
   receive  A4
   set   B4                to "0"
   set   A4                to "0"
end vector

vector  Test_B4_High
   initialize              to Enable_B_to_A
   drive B4
   receive  A4
   set   B4                to "1"
   set   A4                to "1"
end vector

vector  Test_B5_Low
   initialize              to Enable_B_to_A
   drive B5
   receive  A5
   set   B5                to "0"
   set   A5                to "0"
end vector

vector  Test_B5_High
   initialize              to Enable_B_to_A
   drive B5
   receive  A5
   set   B5                to "1"
   set   A5                to "1"
end vector

vector  Test_B6_Low
   initialize              to Enable_B_to_A
   drive B6
   receive  A6
   set   B6                to "0"
   set   A6                to "0"
end vector

vector  Test_B6_High
   initialize              to Enable_B_to_A
   drive B6
   receive  A6
   set   B6                to "1"
   set   A6                to "1"
end vector

vector  Test_B7_Low
   initialize              to Enable_B_to_A
   drive B7
   receive  A7
   set   B7                to "0"
   set   A7                to "0"
end vector

vector  Test_B7_High
   initialize              to Enable_B_to_A
   drive B7
   receive  A7
   set   B7                to "1"
   set   A7                to "1"
end vector

vector  Odd_Parity_Low
   initialize              to Enable_A_to_B
   drive A_bus
   receive  B_bus
   receive  Parity
   set   A_Bus             to "10101011"
   set   B_Bus             to "xxxxxxxx"
   set   Parity            to "0"
   set   Even_Odd          to "1"
end vector

vector  Odd_Parity_High
   initialize              to Enable_A_to_B
   drive A_bus
   receive  B_bus
   receive  Parity
   set   A_Bus             to "10101010"
   set   B_Bus             to "xxxxxxxx"
   set   Parity            to "1"
   set   Even_Odd          to "1"
end vector

vector  Even_Parity_High
   initialize              to Enable_A_to_B
   drive A_bus
   receive  B_bus
   receive  Parity
   set   A_Bus             to "10101011"
   set   B_Bus             to "xxxxxxxx"
   set   Parity            to "1"
   set   Even_Odd          to "0"
end vector

vector  Even_Parity_Low
   initialize              to Enable_A_to_B
   drive A_bus
   receive  B_bus
   receive  Parity
   set   A_Bus             to "10101010"
   set   B_Bus             to "xxxxxxxx"
   set   Parity            to "0"
   set   Even_Odd          to "0"
end vector

vector  A0_to_B0__Disabled
   initialize              to Enable_A_to_B
   drive A0
   receive  B0
   set   Output_Enable_bar to "1"
   set   A0                to "0"
   set   B0                to "1"
end vector

vector  B0_to_A0__Disabled
   initialize              to Enable_B_to_A
   drive B0
   receive  A0
   set   Output_Enable_bar to "1"
   set   B0                to "0"
   set   A0                to "1"
end vector

vector  Check_Errorbar_lo_even_Parity
   drive B_bus, Parity
   set   B_bus             to "00000001"
   set   Parity            to "1"
   set   TR_bar            to "0"
   set   Even_Odd          to "0"
   set   Output_enable_bar to "0"
   set   Error_bar         to "1"
end vector

vector  Check_Errorbar_hi_even_Parity
   drive B_bus, Parity
   set   B_bus             to "00000001"
   set   Parity            to "0"
   set   TR_bar            to "0"
   set   Even_Odd          to "0"
   set   Output_enable_bar to "0"
   set   Error_bar         to "0"
end vector

vector  Check_Errorbar_lo_odd_Parity
   drive B_bus, Parity
   set   B_bus             to "00000001"
   set   Parity            to "1"
   set   TR_bar            to "0"
   set   Even_Odd          to "1"
   set   Output_enable_bar to "0"
   set   Error_bar         to "0"
end vector

vector  Check_Errorbar_hi_odd_Parity
   drive B_bus, Parity
   set   B_bus             to "00000001"
   set   Parity            to "0"
   set   TR_bar            to "0"
   set   Even_Odd          to "1"
   set   Output_enable_bar to "0"
   set   Error_bar         to "1"
end vector

!
!-----------------------------------------------------------------------
!

unit "awaretest E0 A in, B out"       !AT Modified the unit name
   execute  Test_A0_Low
   execute  Test_A0_High
end unit                              !AT Added a new "end unit"

unit "awaretest E1 A in, B out"       !AT Added this unit
   execute  Test_A1_Low
   execute  Test_A1_High
end unit                              !AT Added a new "end unit"

unit "awaretest E2 A in, B out"       !AT Added this unit
   execute  Test_A2_Low
   execute  Test_A2_High
end unit                              !AT Added a new "end unit"

unit "awaretest E3 A in, B out"       !AT Added this unit
   execute  Test_A3_Low
   execute  Test_A3_High
end unit                              !AT Added a new "end unit"

unit "awaretest E4 A in, B out"       !AT Added this unit
   execute  Test_A4_Low
   execute  Test_A4_High
end unit                              !AT Added a new "end unit"

unit "awaretest E5 A in, B out"       !AT Added this unit
   execute  Test_A5_Low
   execute  Test_A5_High
end unit                              !AT Added a new "end unit"

unit "awaretest E6 A in, B out"       !AT Added this unit
   execute  Test_A6_Low
   execute  Test_A6_High
end unit                              !AT Added a new "end unit"

unit "awaretest E7 A in, B out"       !AT Added this unit
   execute  Test_A7_Low
   execute  Test_A7_High
end unit

unit "awaretest E0 B in, A out"       !AT Modified the unit name
   execute  Test_B0_Low
   execute  Test_B0_High
end unit                              !AT Added a new "end unit"

unit "awaretest E1 B in, A out"       !AT Added this unit
   execute  Test_B1_Low
   execute  Test_B1_High
end unit                              !AT Added a new "end unit"

unit "awaretest E2 B in, A out"       !AT Added this unit
   execute  Test_B2_Low
   execute  Test_B2_High
end unit                              !AT Added a new "end unit"

unit "awaretest E3 B in, A out"       !AT Added this unit
   execute  Test_B3_Low
   execute  Test_B3_High
end unit                              !AT Added a new "end unit"

unit "awaretest E4 B in, A out"       !AT Added this unit
   execute  Test_B4_Low
   execute  Test_B4_High
end unit                              !AT Added a new "end unit"

unit "awaretest E5 B in, A out"       !AT Added this unit
   execute  Test_B5_Low
   execute  Test_B5_High
end unit                              !AT Added a new "end unit"

unit "awaretest E6 B in, A out"       !AT Added this unit
   execute  Test_B6_Low
   execute  Test_B6_High
end unit                              !AT Added a new "end unit"

unit "awaretest E7 B in, A out"       !AT Added this unit
   execute  Test_B7_Low
   execute  Test_B7_High
end unit

unit "awaretest Even Parity"          !AT Modified the unit name
   execute  Even_Parity_High
   execute  Even_Parity_Low
end unit                              !AT Added a new "end unit"

unit "awaretest Odd Parity"           !AT Modified the unit name
   execute  Odd_Parity_Low
   execute  Odd_Parity_High
end unit

unit  "Test Error_bar"
   !! Error is checked by driving B bus to pattern "00000001"

   execute  Check_Errorbar_lo_even_Parity
   execute  Check_Errorbar_hi_even_Parity

   execute  Check_Errorbar_lo_odd_Parity
   execute  Check_Errorbar_hi_odd_Parity
end unit

!If pullups are not desired, this unit can be commented out
!If commented the tri-state condition won't be tested.

unit  "Confirm Tristate Function"
   execute  A0_to_B0__Disabled
   execute  B0_to_A0__Disabled
end unit

!
!  End of test
!