!!!!    6    0    1  974790082  V6d04                                         

!  $Log: <@(#) A.10.00  New library.> $

!-----------------------------------------------------------------------
!  Copyright (c) Hewlett-Packard Co. 1996
!
!  All Rights Reserved.  Reproduction, adaptation, or translation
!  without prior written permission is prohibited, except as allowed
!  under the copyright laws.
!
!-----------------------------------------------------------------------
!
! Device        : 74f864
! Manufacturer  : PHILIPS
! Description   : 9-Bit bus Transceivers (inverted, 3-state)
! Package       : 24 Pin DIP
! Test Platform : HP3070
! Safeguard     : high_out_fttl
! Modifications : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."
!
!-----------------------------------------------------------------------
!
! Additional Information.
!
!       1.     Chip Marking:
!                       74F864N
!                       KPH7906
!                       9414KC
!       2.     Ordering Information:
!                       Part Number             Package
!                       N74F864N                24Pin Plastic DIP
!                       N74F864D                24Pin Plastic SOL
!-----------------------------------------------------------------------

combinatorial

vector cycle 1000n
receive delay 900n

assign   VCC            to pins  24
assign   GND            to pins  12

assign   E0_A           to pins   2
assign   E0_B           to pins  23
assign   E1_A           to pins   3
assign   E1_B           to pins  22
assign   E2_A           to pins   4
assign   E2_B           to pins  21
assign   E3_A           to pins   5
assign   E3_B           to pins  20
assign   E4_A           to pins   6
assign   E4_B           to pins  19
assign   E5_A           to pins   7
assign   E5_B           to pins  18
assign   E6_A           to pins   8
assign   E6_B           to pins  17
assign   E7_A           to pins   9
assign   E7_B           to pins  16
assign   E8_A           to pins  10
assign   E8_B           to pins  15

assign   All_A          to pins   2,  3,  4,  5,  6,  7,  8,  9, 10
assign   All_B          to pins  23, 22, 21, 20, 19, 18, 17, 16, 15

assign   Enable_BAbar   to pins  11,  1
assign   Enable_ABbar   to pins  13, 14

assign   Disable_pins   to pins  13, 14, 11,  1
family   TTL

power    VCC, GND

inputs   Enable_BAbar, Enable_ABbar

bidirectional  E0_A, E0_B
bidirectional  E1_A, E1_B, E2_A, E2_B, E3_A, E3_B, E4_A, E4_B
bidirectional  E5_A, E5_B, E6_A, E6_B, E7_A, E7_B, E8_A, E8_B
bidirectional  All_A, All_B

when  Disable_pins  is "1111"   inactive All_B, All_A

when  Enable_ABbar         is "00"   inputs   All_B
when  Enable_ABbar         is "00"   outputs  All_A

when  Enable_BAbar         is "00"   inputs   All_A
when  Enable_BAbar         is "00"   outputs  All_B

trace E0_A  to E0_B
trace E0_B  to E0_A
trace E1_A  to E1_B
trace E1_B  to E1_A
trace E2_A  to E2_B
trace E2_B  to E2_A
trace E3_A  to E3_B
trace E3_B  to E3_A
trace E4_A  to E4_B
trace E4_B  to E4_A
trace E5_A  to E5_B
trace E5_B  to E5_A
trace E6_A  to E6_B
trace E6_B  to E6_A
trace E7_A  to E7_B
trace E7_B  to E7_A
trace E8_A  to E8_B
trace E8_B  to E8_A

disable  All_A, All_B   with   Disable_pins   to     "1111"

!
!-----------------------------------------------------------------------
!

vector  E0_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E0_A           to "1"
   set   E0_B           to "0"
end vector

vector  E0_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E0_A           to "0"
   set   E0_B           to "1"
end vector

vector  E1_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E1_A           to "1"
   set   E1_B           to "0"
end vector

vector  E1_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E1_A           to "0"
   set   E1_B           to "1"
end vector

vector  E2_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E2_A           to "1"
   set   E2_B           to "0"
end vector

vector  E2_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E2_A           to "0"
   set   E2_B           to "1"
end vector

vector  E3_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E3_A           to "1"
   set   E3_B           to "0"
end vector

vector  E3_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E3_A           to "0"
   set   E3_B           to "1"
end vector

vector  E4_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E4_A           to "1"
   set   E4_B           to "0"
end vector

vector  E4_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E4_A           to "0"
   set   E4_B           to "1"
end vector

vector  E5_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E5_A           to "1"
   set   E5_B           to "0"
end vector

vector  E5_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E5_A           to "0"
   set   E5_B           to "1"
end vector

vector  E6_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E6_A           to "1"
   set   E6_B           to "0"
end vector

vector  E6_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E6_A           to "0"
   set   E6_B           to "1"
end vector

vector  E7_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E7_A           to "1"
   set   E7_B           to "0"
end vector

vector  E7_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E7_A           to "0"
   set   E7_B           to "1"
end vector

vector  E8_A_hi
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E8_A           to "1"
   set   E8_B           to "0"
end vector

vector  E8_A_lo
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "00"
   set   Enable_BAbar   to "11"
   set   E8_A           to "0"
   set   E8_B           to "1"
end vector

vector  E0_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E0_A           to "1"
   set   E0_B           to "0"
end vector

vector  E0_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E0_A           to "0"
   set   E0_B           to "1"
end vector

vector  E1_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E1_A           to "1"
   set   E1_B           to "0"
end vector

vector  E1_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E1_A           to "0"
   set   E1_B           to "1"
end vector

vector  E2_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E2_A           to "1"
   set   E2_B           to "0"
end vector

vector  E2_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E2_A           to "0"
   set   E2_B           to "1"
end vector

vector  E3_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E3_A           to "1"
   set   E3_B           to "0"
end vector

vector  E3_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E3_A           to "0"
   set   E3_B           to "1"
end vector

vector  E4_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E4_A           to "1"
   set   E4_B           to "0"
end vector

vector  E4_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E4_A           to "0"
   set   E4_B           to "1"
end vector

vector  E5_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E5_B           to "1"
   set   E5_A           to "0"
end vector

vector  E5_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E5_B           to "0"
   set   E5_A           to "1"
end vector

vector  E6_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E6_B           to "1"
   set   E6_A           to "0"
end vector

vector  E6_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E6_B           to "0"
   set   E6_A           to "1"
end vector

vector  E7_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E7_B           to "1"
   set   E7_A           to "0"
end vector

vector  E7_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E7_B           to "0"
   set   E7_A           to "1"
end vector

vector  E8_B_hi
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E8_B           to "1"
   set   E8_A           to "0"
end vector

vector  E8_B_lo
   drive All_B
   receive  All_A
   set   Enable_BAbar   to "00"
   set   Enable_ABbar   to "11"
   set   E8_B           to "0"
   set   E8_A           to "1"
end vector

!*****VECTORS FOR DISABLE TESTS*****

vector  E1_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E1_A           to "1"
   set   E1_B           to "1"
end vector

vector  E1_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E1_A           to "0"
   set   E1_B           to "0"
end vector

vector  E2_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E2_A           to "1"
   set   E2_B           to "1"
end vector

vector  E2_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E2_A           to "0"
   set   E2_B           to "0"
end vector

vector  E3_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E3_A           to "1"
   set   E3_B           to "1"
end vector

vector  E3_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E3_A           to "0"
   set   E3_B           to "0"
end vector

vector  E4_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E4_A           to "1"
   set   E4_B           to "1"
end vector

vector  E4_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E4_A           to "0"
   set   E4_B           to "0"
end vector

vector  E5_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E5_A           to "1"
   set   E5_B           to "1"
end vector

vector  E5_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E5_A           to "0"
   set   E5_B           to "0"
end vector

vector  E6_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E6_A           to "1"
   set   E6_B           to "1"
end vector

vector  E6_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E6_A           to "0"
   set   E6_B           to "0"
end vector

vector  E7_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E7_A           to "1"
   set   E7_B           to "1"
end vector

vector  E7_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E7_A           to "0"
   set   E7_B           to "0"
end vector

vector  E8_A_hi_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E8_A           to "1"
   set   E8_B           to "1"
end vector

vector  E8_A_lo_Disabled
   drive All_A
   receive  All_B
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E8_A           to "0"
   set   E8_B           to "0"
end vector

vector  E1_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E1_A           to "1"
   set   E1_B           to "1"
end vector

vector  E1_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E1_A           to "0"
   set   E1_B           to "0"
end vector

vector  E2_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E2_A           to "1"
   set   E2_B           to "1"
end vector

vector  E2_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E2_A           to "0"
   set   E2_B           to "0"
end vector

vector  E3_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E3_A           to "1"
   set   E3_B           to "1"
end vector

vector  E3_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E3_A           to "0"
   set   E3_B           to "0"
end vector

vector  E4_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E4_A           to "1"
   set   E4_B           to "1"
end vector

vector  E4_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E4_A           to "0"
   set   E4_B           to "0"
end vector

vector  E5_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E5_B           to "1"
   set   E5_A           to "1"
end vector

vector  E5_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E5_B           to "0"
   set   E5_A           to "0"
end vector

vector  E6_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E6_B           to "1"
   set   E6_A           to "1"
end vector

vector  E6_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E6_B           to "0"
   set   E6_A           to "0"
end vector

vector  E7_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E7_B           to "1"
   set   E7_A           to "1"
end vector

vector  E7_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "11"
   set   E7_B           to "0"
   set   E7_A           to "0"
end vector

vector  E8_B_hi_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "11"
   set   Enable_BAbar   to "10"
   set   E8_B           to "1"
   set   E8_A           to "1"
end vector

vector  E8_B_lo_Disabled
   drive All_B
   receive  All_A
   set   Enable_ABbar   to "10"
   set   Enable_BAbar   to "11"
   set   E8_B           to "0"
   set   E8_A           to "0"
end vector

vector  E8_B_lo_DisabledX
   receive  All_A
   receive  All_B
   set   Enable_ABbar   to "10"
   set   Enable_BAbar   to "10"
   set   E8_B           to "1"
   set   E8_A           to "1"
end vector

!
!-----------------------------------------------------------------------
!

unit "awaretest E0 A in, B out"       !AT Modified the unit name
   execute  E0_A_lo
   execute  E0_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E1 A in, B out"       !AT Added this unit
   execute  E1_A_lo
   execute  E1_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E2 A in, B out"       !AT Added this unit
   execute  E2_A_lo
   execute  E2_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E3 A in, B out"       !AT Added this unit
   execute  E3_A_lo
   execute  E3_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E4 A in, B out"       !AT Added this unit
   execute  E4_A_lo
   execute  E4_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E5 A in, B out"       !AT Added this unit
   execute  E5_A_lo
   execute  E5_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E6 A in, B out"       !AT Added this unit
   execute  E6_A_lo
   execute  E6_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E7 A in, B out"       !AT Added this unit
   execute  E7_A_lo
   execute  E7_A_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E8 A in, B out"       !AT Added this unit
   execute  E8_A_lo
   execute  E8_A_hi
end unit

unit "awaretest E0 B in, A out"       !AT Modified the unit name
   execute  E0_B_lo
   execute  E0_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E1 B in, A out"       !AT Added this unit
   execute  E1_B_lo
   execute  E1_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E2 B in, A out"       !AT Added this unit
   execute  E2_B_lo
   execute  E2_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E3 B in, A out"       !AT Added this unit
   execute  E3_B_lo
   execute  E3_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E4 B in, A out"       !AT Added this unit
   execute  E4_B_lo
   execute  E4_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E5 B in, A out"       !AT Added this unit
   execute  E5_B_lo
   execute  E5_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E6 B in, A out"       !AT Added this unit
   execute  E6_B_lo
   execute  E6_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E7 B in, A out"       !AT Added this unit
   execute  E7_B_lo
   execute  E7_B_hi
end unit                              !AT Added a new "end unit"

unit "awaretest E8 B in, A out"       !AT Added this unit
   execute  E8_B_lo
   execute  E8_B_hi
end unit

!*****TESTS FOR DISABLE **************************

unit  disable test "Disable Test for B Outputs"
   execute  E1_A_lo_Disabled
   execute  E1_A_hi_Disabled
   execute  E1_A_lo_Disabled
   execute  E2_A_lo_Disabled
   execute  E2_A_hi_Disabled
   execute  E2_A_lo_Disabled
   execute  E3_A_lo_Disabled
   execute  E3_A_hi_Disabled
   execute  E3_A_lo_Disabled
   execute  E4_A_lo_Disabled
   execute  E4_A_hi_Disabled
   execute  E4_A_lo_Disabled
   execute  E5_A_lo_Disabled
   execute  E5_A_hi_Disabled
   execute  E5_A_lo_Disabled
   execute  E6_A_lo_Disabled
   execute  E6_A_hi_Disabled
   execute  E6_A_lo_Disabled
   execute  E7_A_lo_Disabled
   execute  E7_A_hi_Disabled
   execute  E7_A_lo_Disabled
   execute  E8_A_lo_Disabled
   execute  E8_A_hi_Disabled
   execute  E8_A_lo_Disabled
end unit

unit  disable test "Disable Test for A Outputs"
!   execute  E1_B_lo_Disabled
!   execute  E1_B_hi_Disabled
!   execute  E1_B_lo_Disabled
!   execute  E2_B_lo_Disabled
!   execute  E2_B_hi_Disabled
!   execute  E2_B_lo_Disabled
!   execute  E3_B_lo_Disabled
!   execute  E3_B_hi_Disabled
!   execute  E3_B_lo_Disabled
!   execute  E4_B_lo_Disabled
!   execute  E4_B_hi_Disabled
!   execute  E4_B_lo_Disabled
!   execute  E5_B_lo_Disabled
!   execute  E5_B_hi_Disabled
!   execute  E5_B_lo_Disabled
!   execute  E6_B_lo_Disabled
!   execute  E6_B_hi_Disabled
!   execute  E6_B_lo_Disabled
!   execute  E7_B_lo_Disabled
!   execute  E7_B_hi_Disabled
!   execute  E7_B_lo_Disabled
!   execute  E8_B_lo_Disabled
!   execute  E8_B_hi_Disabled
!   execute  E8_B_lo_Disabled
   execute  E8_B_lo_DisabledX
end unit

!
!  End of test
!