!!!!    6    0    1  974687435  V8277                                         

! Device           : 81ls95
! Function         : Tri-state Octal Buffer
! revision         : B.01.00
! safeguard        : high_out_lsttl
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

combinatorial

vector cycle 2u
receive delay 1.9u

assign VCC          to pins 20
assign GND          to pins 10

assign E1_input     to pins 2
assign E1_output    to pins 3

assign E2_input     to pins 4
assign E2_output    to pins 5

assign E3_input     to pins 6
assign E3_output    to pins 7

assign E4_input     to pins 8
assign E4_output    to pins 9

assign E5_input     to pins 12
assign E5_output    to pins 11

assign E6_input     to pins 14
assign E6_output    to pins 13

assign E7_input     to pins 16
assign E7_output    to pins 15

assign E8_input     to pins 18
assign E8_output    to pins 17

assign Low_enable   to pins 1,19
assign Low_enable_1 to pins 1
assign Low_enable_2 to pins 19

assign All_outputs to pins 17,15,13,11,9,7,5,3
power VCC,GND

family TTL

inputs E1_input,E2_input,E3_input,E4_input,E5_input,E6_input,E7_input,E8_input
inputs Low_enable,Low_enable_1,Low_enable_2

outputs E1_output,E2_output,E3_output,E4_output,E5_output,E6_output,E7_output
outputs E8_output,All_outputs

disable E1_output,E2_output,E3_output,E4_output with Low_enable_1 to "1"
disable E1_output,E2_output,E3_output,E4_output with Low_enable_2 to "1"
disable E5_output,E6_output,E7_output,E8_output with Low_enable_1 to "1"
disable E5_output,E6_output,E7_output,E8_output with Low_enable_2 to "1"

when Low_enable_1 is "1" inactive All_outputs
when Low_enable_2 is "1" inactive All_outputs

trace E1_output to E1_input, Low_enable
trace E2_output to E2_input, Low_enable
trace E3_output to E3_input, Low_enable
trace E4_output to E4_input, Low_enable
trace E5_output to E5_input, Low_enable
trace E6_output to E6_input, Low_enable
trace E7_output to E7_input, Low_enable
trace E8_output to E8_input, Low_enable

!*******************************************************************************
!*******************************************************************************

vector E1_high
   set Low_enable to "00"
   set E1_input  to "1"
   set E1_output to "1"
end vector

vector E1_low
   set Low_enable to "00"
   set E1_input  to "0"
   set E1_output to "0"
end vector

vector E2_high
   set Low_enable to "00"
   set E2_input  to "1"
   set E2_output to "1"
end vector

vector E2_low
   set Low_enable to "00"
   set E2_input  to "0"
   set E2_output to "0"
end vector

vector E3_high
   set Low_enable to "00"
   set E3_input  to "1"
   set E3_output to "1"
end vector

vector E3_low
   set Low_enable to "00"
   set E3_input  to "0"
   set E3_output to "0"
end vector

vector E4_high
   set Low_enable to "00"
   set E4_input  to "1"
   set E4_output to "1"
end vector

vector E4_low
   set Low_enable to "00"
   set E4_input  to "0"
   set E4_output to "0"
end vector

vector E5_high
   set Low_enable to "00"
   set E5_input  to "1"
   set E5_output to "1"
end vector

vector E5_low
   set Low_enable to "00"
   set E5_input  to "0"
   set E5_output to "0"
end vector

vector E6_high
   set Low_enable to "00"
   set E6_input  to "1"
   set E6_output to "1"
end vector

vector E6_low
   set Low_enable to "00"
   set E6_input  to "0"
   set E6_output to "0"
end vector

vector E7_high
   set Low_enable to "00"
   set E7_input  to "1"
   set E7_output to "1"
end vector

vector E7_low
   set Low_enable to "00"
   set E7_input  to "0"
   set E7_output to "0"
end vector

vector E8_high
   set Low_enable to "00"
   set E8_input  to "1"
   set E8_output to "1"
end vector

vector E8_low
   set Low_enable to "00"
   set E8_input  to "0"
   set E8_output to "0"
end vector

!*****VECTORS FOR DISABLE TESTS*****

vector E1_low_Disabled_1
    set Low_enable_1  to "1"
    set E1_Input      to "0"
    set E1_Output     to "0"
end vector

vector E1_high_Disabled_1
    set Low_enable_1  to "1"
    set E1_Input      to "1"
    set E1_Output     to "1"
end vector

vector E1_low_Disabled_2
    set Low_enable_2  to "1"
    set E1_Input      to "0"
    set E1_Output     to "0"
end vector

vector E1_high_Disabled_2
    set Low_enable_2  to "1"
    set E1_Input      to "1"
    set E1_Output     to "1"
end vector

vector E2_low_Disabled_1
    set Low_enable_1  to "1"
    set E2_Input      to "0"
    set E2_Output     to "0"
end vector

vector E2_high_Disabled_1
    set Low_enable_1  to "1"
    set E2_Input      to "1"
    set E2_Output     to "1"
end vector

vector E2_low_Disabled_2
    set Low_enable_2  to "1"
    set E2_Input      to "0"
    set E2_Output     to "0"
end vector

vector E2_high_Disabled_2
    set Low_enable_2  to "1"
    set E2_Input      to "1"
    set E2_Output     to "1"
end vector

vector E3_low_Disabled_1
    set Low_enable_1  to "1"
    set E3_Input      to "0"
    set E3_Output     to "0"
end vector

vector E3_high_Disabled_1
    set Low_enable_1  to "1"
    set E3_Input      to "1"
    set E3_Output     to "1"
end vector

vector E3_low_Disabled_2
    set Low_enable_2  to "1"
    set E3_Input      to "0"
    set E3_Output     to "0"
end vector

vector E3_high_Disabled_2
    set Low_enable_2  to "1"
    set E3_Input      to "1"
    set E3_Output     to "1"
end vector

vector E4_low_Disabled_1
    set Low_enable_1  to "1"
    set E4_Input      to "0"
    set E4_Output     to "0"
end vector

vector E4_high_Disabled_1
    set Low_enable_1  to "1"
    set E4_Input      to "1"
    set E4_Output     to "1"
end vector

vector E4_low_Disabled_2
    set Low_enable_2  to "1"
    set E4_Input      to "0"
    set E4_Output     to "0"
end vector

vector E4_high_Disabled_2
    set Low_enable_2  to "1"
    set E4_Input      to "1"
    set E4_Output     to "1"
end vector

vector E5_low_Disabled_1
    set Low_enable_1  to "1"
    set E5_Input      to "0"
    set E5_Output     to "0"
end vector

vector E5_high_Disabled_1
    set Low_enable_1  to "1"
    set E5_Input      to "1"
    set E5_Output     to "1"
end vector

vector E5_low_Disabled_2
    set Low_enable_2  to "1"
    set E5_Input      to "0"
    set E5_Output     to "0"
end vector

vector E5_high_Disabled_2
    set Low_enable_2  to "1"
    set E5_Input      to "1"
    set E5_Output     to "1"
end vector

vector E6_low_Disabled_1
    set Low_enable_1  to "1"
    set E6_Input      to "0"
    set E6_Output     to "0"
end vector

vector E6_high_Disabled_1
    set Low_enable_1  to "1"
    set E6_Input      to "1"
    set E6_Output     to "1"
end vector

vector E6_low_Disabled_2
    set Low_enable_2  to "1"
    set E6_Input      to "0"
    set E6_Output     to "0"
end vector

vector E6_high_Disabled_2
    set Low_enable_2  to "1"
    set E6_Input      to "1"
    set E6_Output     to "1"
end vector

vector E7_low_Disabled_1
    set Low_enable_1  to "1"
    set E7_Input      to "0"
    set E7_Output     to "0"
end vector

vector E7_high_Disabled_1
    set Low_enable_1  to "1"
    set E7_Input      to "1"
    set E7_Output     to "1"
end vector

vector E7_low_Disabled_2
    set Low_enable_2  to "1"
    set E7_Input      to "0"
    set E7_Output     to "0"
end vector

vector E7_high_Disabled_2
    set Low_enable_2  to "1"
    set E7_Input      to "1"
    set E7_Output     to "1"
end vector

vector E8_low_Disabled_1
    set Low_enable_1  to "1"
    set E8_Input      to "0"
    set E8_Output     to "0"
end vector

vector E8_high_Disabled_1
    set Low_enable_1  to "1"
    set E8_Input      to "1"
    set E8_Output     to "1"
end vector

vector E8_low_Disabled_2
    set Low_enable_2  to "1"
    set E8_Input      to "0"
    set E8_Output     to "0"
end vector

vector E8_high_Disabled_2
    set Low_enable_2  to "1"
    set E8_Input      to "1"
    set E8_Output     to "1"
end vector

!*******************************************************************************

unit "awaretest E1"                   !AT Modified the unit name
   execute     E1_high
   execute     E1_low
end unit                              !AT Added a new "end unit"

unit "awaretest E2"                   !AT Added this unit
   execute     E2_high
   execute     E2_low
end unit                              !AT Added a new "end unit"

unit "awaretest E3"                   !AT Added this unit
   execute     E3_high
   execute     E3_low
end unit                              !AT Added a new "end unit"

unit "awaretest E4"                   !AT Added this unit
   execute     E4_high
   execute     E4_low
end unit                              !AT Added a new "end unit"

unit "awaretest E5"                   !AT Added this unit
   execute     E5_high
   execute     E5_low
end unit                              !AT Added a new "end unit"

unit "awaretest E6"                   !AT Added this unit
   execute     E6_high
   execute     E6_low
end unit                              !AT Added a new "end unit"

unit "awaretest E7"                   !AT Added this unit
   execute     E7_high
   execute     E7_low
end unit                              !AT Added a new "end unit"

unit "awaretest E8"                   !AT Added this unit
   execute     E8_high
   execute     E8_low
end unit

!*****TESTS FOR DISABLE ***********************************************

unit disable test "Disable test with Low_enable_1 high"
     execute E1_low_Disabled_1
     execute E1_high_Disabled_1
     execute E1_low_Disabled_1
     execute E2_low_Disabled_1
     execute E2_high_Disabled_1
     execute E2_low_Disabled_1
     execute E3_low_Disabled_1
     execute E3_high_Disabled_1
     execute E3_low_Disabled_1
     execute E4_low_Disabled_1
     execute E4_high_Disabled_1
     execute E4_low_Disabled_1
     execute E5_low_Disabled_1
     execute E5_high_Disabled_1
     execute E5_low_Disabled_1
     execute E6_low_Disabled_1
     execute E6_high_Disabled_1
     execute E6_low_Disabled_1
     execute E7_low_Disabled_1
     execute E7_high_Disabled_1
     execute E7_low_Disabled_1
     execute E8_low_Disabled_1
     execute E8_high_Disabled_1
     execute E8_low_Disabled_1
end unit

unit disable test "Disable test with Low_enable_2 high"
     execute E1_low_Disabled_2
     execute E1_high_Disabled_2
     execute E1_low_Disabled_2
     execute E2_low_Disabled_2
     execute E2_high_Disabled_2
     execute E2_low_Disabled_2
     execute E3_low_Disabled_2
     execute E3_high_Disabled_2
     execute E3_low_Disabled_2
     execute E4_low_Disabled_2
     execute E4_high_Disabled_2
     execute E4_low_Disabled_2
     execute E5_low_Disabled_2
     execute E5_high_Disabled_2
     execute E5_low_Disabled_2
     execute E6_low_Disabled_2
     execute E6_high_Disabled_2
     execute E6_low_Disabled_2
     execute E7_low_Disabled_2
     execute E7_high_Disabled_2
     execute E7_low_Disabled_2
     execute E8_low_Disabled_2
     execute E8_high_Disabled_2
     execute E8_low_Disabled_2
end unit

!END OF TEST!