!!!! 6 0 1 974788720 Vad93 ! Device : 3448 ! Function : Bus_transceiver 3-state IEEEE-488_interface quad ! revision : B.01.00 ! safeguard : hi_oc_sttl ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." combinatorial assign VCC to pins 16 assign GND to pins 8 assign Data_A to pins 2 assign Data_B to pins 6 assign Data_C to pins 10 assign Data_D to pins 14 assign Bus_A to pins 3 assign Bus_B to pins 5 assign Bus_C to pins 11 assign Bus_D to pins 13 assign Pull_up_enable_AB to pins 4 assign Pull_up_enable_CD to pins 12 assign Send_Rec_A_input to pins 1 assign Send_Rec_B_input to pins 7 assign Send_Rec_C_input to pins 9 assign Send_Rec_D_input to pins 15 family TTL power VCC, GND inputs Pull_up_enable_AB, Pull_up_enable_CD inputs Send_Rec_A_input, Send_Rec_B_input inputs Send_Rec_C_input, Send_Rec_D_input bidirectional Data_A, Data_B, Data_C, Data_D bidirectional Bus_A, Bus_B, Bus_C, Bus_D when Send_Rec_A_input is "0" inputs Bus_A when Send_Rec_A_input is "0" outputs Data_A when Send_Rec_A_input is "1" outputs Bus_A when Send_Rec_A_input is "1" inputs Data_A when Send_Rec_B_input is "0" inputs Bus_B when Send_Rec_B_input is "0" outputs Data_B when Send_Rec_B_input is "1" outputs Bus_B when Send_Rec_B_input is "1" inputs Data_B when Send_Rec_C_input is "0" inputs Bus_C when Send_Rec_C_input is "0" outputs Data_C when Send_Rec_C_input is "1" outputs Bus_C when Send_Rec_C_input is "1" inputs Data_C when Send_Rec_D_input is "0" inputs Bus_D when Send_Rec_D_input is "0" outputs Data_D when Send_Rec_D_input is "1" outputs Bus_D when Send_Rec_D_input is "1" inputs Data_D trace Bus_A to Data_A,Send_Rec_A_input,Pull_up_enable_AB trace Data_A to Bus_A,Send_Rec_A_input,Pull_up_enable_AB trace Bus_B to Data_B,Send_Rec_B_input,Pull_up_enable_AB trace Data_B to Bus_B,Send_Rec_B_input,Pull_up_enable_AB trace Bus_C to Data_C,Send_Rec_C_input,Pull_up_enable_CD trace Data_C to Bus_C,Send_Rec_C_input,Pull_up_enable_CD trace Bus_D to Data_D,Send_Rec_D_input,Pull_up_enable_CD trace Data_D to Bus_D,Send_Rec_D_input,Pull_up_enable_CD disable Bus_A with Send_Rec_A_input to "0" disable Bus_B with Send_Rec_B_input to "0" disable Bus_C with Send_Rec_C_input to "0" disable Bus_D with Send_Rec_D_input to "0" disable Data_A with Send_Rec_A_input to "1" disable Data_B with Send_Rec_B_input to "1" disable Data_C with Send_Rec_C_input to "1" disable Data_D with Send_Rec_D_input to "1" !********************************************************************* !********************************************************************* vector Data_A_low_drive drive Data_A receive Bus_A set Data_A to "0" set Bus_A to "0" set Send_Rec_A_input to "1" set Pull_up_enable_AB to "1" end vector vector Data_A_high_drive drive Data_A receive Bus_A set Data_A to "1" set Bus_A to "1" set Send_Rec_A_input to "1" set Pull_up_enable_AB to "1" end vector vector Data_B_low_drive drive Data_B receive Bus_B set Data_B to "0" set Bus_B to "0" set Send_Rec_B_input to "1" set Pull_up_enable_AB to "1" end vector vector Data_B_high_drive drive Data_B receive Bus_B set Data_B to "1" set Bus_B to "1" set Send_Rec_B_input to "1" set Pull_up_enable_AB to "1" end vector vector Data_C_low_drive drive Data_C receive Bus_C set Data_C to "0" set Bus_C to "0" set Send_Rec_C_input to "1" set Pull_up_enable_CD to "1" end vector vector Data_C_high_drive drive Data_C receive Bus_C set Data_C to "1" set Bus_C to "1" set Send_Rec_C_input to "1" set Pull_up_enable_CD to "1" end vector vector Data_D_low_drive drive Data_D receive Bus_D set Data_D to "0" set Bus_D to "0" set Send_Rec_D_input to "1" set Pull_up_enable_CD to "1" end vector vector Data_D_high_drive drive Data_D receive Bus_D set Data_D to "1" set Bus_D to "1" set Send_Rec_D_input to "1" set Pull_up_enable_CD to "1" end vector vector Data_A_low_drive_oc_output drive Data_A receive Bus_A set Data_A to "0" set Bus_A to "0" set Send_Rec_A_input to "1" set Pull_up_enable_AB to "0" end vector vector Data_A_high_drive_oc_output drive Data_A receive Bus_A set Data_A to "1" set Bus_A to "1" set Send_Rec_A_input to "1" set Pull_up_enable_AB to "0" end vector vector Data_B_low_drive_oc_output drive Data_B receive Bus_B set Data_B to "0" set Bus_B to "0" set Send_Rec_B_input to "1" set Pull_up_enable_AB to "0" end vector vector Data_B_high_drive_oc_output drive Data_B receive Bus_B set Data_B to "1" set Bus_B to "1" set Send_Rec_B_input to "1" set Pull_up_enable_AB to "0" end vector vector Data_C_low_drive_oc_output drive Data_C receive Bus_C set Data_C to "0" set Bus_C to "0" set Send_Rec_C_input to "1" set Pull_up_enable_CD to "0" end vector vector Data_C_high_drive_oc_output drive Data_C receive Bus_C set Data_C to "1" set Bus_C to "1" set Send_Rec_C_input to "1" set Pull_up_enable_CD to "0" end vector vector Data_D_low_drive_oc_output drive Data_D receive Bus_D set Data_D to "0" set Bus_D to "0" set Send_Rec_D_input to "1" set Pull_up_enable_CD to "0" end vector vector Data_D_high_drive_oc_output drive Data_D receive Bus_D set Data_D to "1" set Bus_D to "1" set Send_Rec_D_input to "1" set Pull_up_enable_CD to "0" end vector vector Data_A_low_receive drive Bus_A receive Data_A set Data_A to "0" set Bus_A to "0" set Send_Rec_A_input to "0" set Pull_up_enable_AB to "1" end vector vector Data_A_high_receive drive Bus_A receive Data_A set Data_A to "1" set Bus_A to "1" set Send_Rec_A_input to "0" set Pull_up_enable_AB to "1" end vector vector Data_B_low_receive drive Bus_B receive Data_B set Data_B to "0" set Bus_B to "0" set Send_Rec_B_input to "0" set Pull_up_enable_AB to "1" end vector vector Data_B_high_receive drive Bus_B receive Data_B set Data_B to "1" set Bus_B to "1" set Send_Rec_B_input to "0" set Pull_up_enable_AB to "1" end vector vector Data_C_low_receive drive Bus_C receive Data_C set Data_C to "0" set Bus_C to "0" set Send_Rec_C_input to "0" set Pull_up_enable_CD to "1" end vector vector Data_C_high_receive drive Bus_C receive Data_C set Data_C to "1" set Bus_C to "1" set Send_Rec_C_input to "0" set Pull_up_enable_CD to "1" end vector vector Data_D_low_receive drive Bus_D receive Data_D set Data_D to "0" set Bus_D to "0" set Send_Rec_D_input to "0" set Pull_up_enable_CD to "1" end vector vector Data_D_high_receive drive Bus_D receive Data_D set Data_D to "1" set Bus_D to "1" set Send_Rec_D_input to "0" set Pull_up_enable_CD to "1" end vector !********************************************************************* !********************************************************************* unit "awaretest E1 A drive" !AT Modified the unit name execute Data_A_low_drive execute Data_A_high_drive end unit !AT Added a new "end unit" unit "awaretest E2 B drive" !AT Added this unit execute Data_B_low_drive execute Data_B_high_drive end unit !AT Added a new "end unit" unit "awaretest E3 C drive" !AT Added this unit execute Data_C_low_drive execute Data_C_high_drive end unit !AT Added a new "end unit" unit "awaretest E4 D drive" !AT Added this unit execute Data_D_low_drive execute Data_D_high_drive end unit !AT Added a new "end unit" unit "awaretest E1 A drive oc output" !AT Added this unit execute Data_A_low_drive_oc_output execute Data_A_high_drive_oc_output end unit !AT Added a new "end unit" unit "awaretest E2 B drive oc output" !AT Added this unit execute Data_B_low_drive_oc_output execute Data_B_high_drive_oc_output end unit !AT Added a new "end unit" unit "awaretest E3 C drive oc output" !AT Added this unit execute Data_C_low_drive_oc_output execute Data_C_high_drive_oc_output end unit !AT Added a new "end unit" unit "awaretest E4 D drive oc output" !AT Added this unit execute Data_D_low_drive_oc_output execute Data_D_high_drive_oc_output end unit !AT Added a new "end unit" unit "awaretest E1 A receive" !AT Added this unit execute Data_A_low_receive execute Data_A_high_receive end unit !AT Added a new "end unit" unit "awaretest E2 B receive" !AT Added this unit execute Data_B_low_receive execute Data_B_high_receive end unit !AT Added a new "end unit" unit "awaretest E3 C receive" !AT Added this unit execute Data_C_low_receive execute Data_C_high_receive end unit !AT Added a new "end unit" unit "awaretest E4 D receive" !AT Added this unit execute Data_D_low_receive execute Data_D_high_receive end unit ! End of test