!!!! 6 0 1 989956214 Vb9e7 ! Device : 2564 ! Function : uv_prom 8k x 8 ! revision : B.01.00 ! safeguard : med_out_mos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential vector cycle 800n receive delay 700n ! tAA = 450ns ! Note: Pins 28 and 26 are internally connected; either or ! both may be used for supplying +5 volts. Pin 28 is assumed ! to be used for this test, while pin 26 is non-digital. ! assign VCC to pins 28 ! +5 volts assign Extra_VCC to pins 26 ! Not used in this test assign GND to pins 14 ! VSS assign Address to pins 23,20,21,24,25 assign Address to pins 3,4,5,6,7,8,9,10 assign Output to pins 19,18,17,16,15,13,12,11 assign Data_D0 to pins 11 !AT Added for minimum pin test. assign Data_D1 to pins 12 !AT Added for minimum pin test. assign Data_D2 to pins 13 !AT Added for minimum pin test. assign Data_D3 to pins 15 !AT Added for minimum pin test. assign Data_D4 to pins 16 !AT Added for minimum pin test. assign Data_D5 to pins 17 !AT Added for minimum pin test. assign Data_D6 to pins 18 !AT Added for minimum pin test. assign Data_D7 to pins 19 !AT Added for minimum pin test. assign Chip_select_bar to pins 27,2 ! CS2_bar, CS1_bar assign PD_PGM_bar to pins 22 assign VPP to pins 1 family TTL power VCC, GND inputs Address, Chip_select_bar, PD_PGM_bar outputs Output outputs Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test. outputs Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test. nondigital VPP, Extra_VCC when Chip_select_bar is "1x" inactive Output when Chip_select_bar is "x1" inactive Output when PD_PGM_bar is "1" inactive Output trace Output to Address,Chip_select_bar,PD_PGM_bar disable Output with Chip_select_bar to "1x" disable Output with Chip_select_bar to "x1" disable Output with PD_PGM_bar to "1" !*************************************************************** !*************************************************************** vector Address_counter set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Output to "00000000" upcounter Address end vector vector Address_counter_2 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "1111111111111" set Output to "00000000" downcounter Address end vector vector Read_deselected_1 set PD_PGM_bar to "0" set Chip_select_bar to "01" set Address to "0000000000000" set Output to "11111111" end vector vector Read_deselected_2 set PD_PGM_bar to "0" set Chip_select_bar to "10" set Address to "0000000000000" set Output to "11111111" end vector vector Read_powered_down set PD_PGM_bar to "1" set Chip_select_bar to "00" set Address to "0000000000000" set Output to "11111111" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Address_counter_D0 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D0 to "0" upcounter Address end vector vector Address_counter_D1 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D1 to "0" upcounter Address end vector vector Address_counter_D2 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D2 to "0" upcounter Address end vector vector Address_counter_D3 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D3 to "0" upcounter Address end vector vector Address_counter_D4 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D4 to "0" upcounter Address end vector vector Address_counter_D5 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D5 to "0" upcounter Address end vector vector Address_counter_D6 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D6 to "0" upcounter Address end vector vector Address_counter_D7 set PD_PGM_bar to "0" set Chip_select_bar to "00" set Address to "0000000000000" set Data_D7 to "0" upcounter Address end vector !*************************************************************** !*************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" preset counter Address_counter_D0 compress repeat 255 times count Address_counter_D0 compress end repeat end unit unit "awaretest D1 Test" preset counter Address_counter_D1 compress repeat 255 times count Address_counter_D1 compress end repeat end unit unit "awaretest D2 Test" preset counter Address_counter_D2 compress repeat 255 times count Address_counter_D2 compress end repeat end unit unit "awaretest D3 Test" preset counter Address_counter_D3 compress repeat 255 times count Address_counter_D3 compress end repeat end unit unit "awaretest D4 Test" preset counter Address_counter_D4 compress repeat 255 times count Address_counter_D4 compress end repeat end unit unit "awaretest D5 Test" preset counter Address_counter_D5 compress repeat 255 times count Address_counter_D5 compress end repeat end unit unit "awaretest D6 Test" preset counter Address_counter_D6 compress repeat 255 times count Address_counter_D6 compress end repeat end unit unit "awaretest D7 Test" preset counter Address_counter_D7 compress repeat 255 times count Address_counter_D7 compress end repeat end unit ! The data in the first 512 addresses and in the last 512 addresses ! are compressed and the result is compared with that learned from ! a known good device. More of the data can be tested by increasing ! the value of the loop counters, which also increases test time. ! Setting the repeat loops to 4095 causes data from all addresses ! to be compressed, but results in a test time of almost 14ms. unit "Compress data" preset counter Address_counter compress repeat 511 times count Address_counter compress end repeat preset counter Address_counter_2 compress repeat 511 times count Address_counter_2 compress end repeat end unit ! If PULL-UPS exist on the outputs AND the data in the first ! address is NOT all 1's, the following unit can be included ! to verify that CS1_bar is not stuck-at-0. ! !unit "Deselect 1" ! execute Read_deselected_1 !end unit ! If PULL-UPS exist on the outputs AND the data in the first ! address is NOT all 1's, the following unit can be included ! to verify that CS2_bar is not stuck-at-0. ! !unit "Deselect 2" ! execute Read_deselected_2 !end unit ! If PULL-UPS exist on the outputs AND the data in the first ! address is NOT all 1's, the following unit can be included ! to verify that PD_PGM_bar is not stuck-at-0. ! !unit "Power down" ! execute Read_powered_down !end unit ! End of test