!!!! 6 0 1 989966367 V87fe ! Device : 2716 ! Function : uv_prom 3-state 2k x 8 ! revision : B.01.00 ! safeguard : med_out_mos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential warning "Pull-ups are required to test high-impedance outputs." vector cycle 1000n receive delay 900n assign VCC to pins 24 assign GND to pins 12 assign VPP to pins 21 assign Address to pins 19,22,23,1,2,3,4,5,6,7,8 assign Data to pins 17,16,15,14,13,11,10,9 assign Data_D0 to pins 9 !AT Added for minimum pin test. assign Data_D1 to pins 10 !AT Added for minimum pin test. assign Data_D2 to pins 11 !AT Added for minimum pin test. assign Data_D3 to pins 13 !AT Added for minimum pin test. assign Data_D4 to pins 14 !AT Added for minimum pin test. assign Data_D5 to pins 15 !AT Added for minimum pin test. assign Data_D6 to pins 16 !AT Added for minimum pin test. assign Data_D7 to pins 17 !AT Added for minimum pin test. assign Chip_enable_bar to pins 18 assign Output_enable_bar to pins 20 family TTL power VCC, GND inputs Address, Chip_enable_bar, Output_enable_bar outputs Data outputs Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test. outputs Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test. nondigital VPP when Chip_enable_bar is "1" inactive Data when Output_enable_bar is "1" inactive Data trace Data to Address,Chip_enable_bar,Output_enable_bar disable Data with Chip_enable_bar to "1" disable Data with Output_enable_bar to "1" set load on groups Data to pull up !*************************************************************** !*************************************************************** vector Address_counter set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data to "00000000" upcounter Address end vector vector Address_counter_2 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "11000000000" set Data to "00000000" upcounter Address end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Address_counter_D0 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D0 to "0" upcounter Address end vector vector Address_counter_D1 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D1 to "0" upcounter Address end vector vector Address_counter_D2 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D2 to "0" upcounter Address end vector vector Address_counter_D3 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D3 to "0" upcounter Address end vector vector Address_counter_D4 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D4 to "0" upcounter Address end vector vector Address_counter_D5 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D5 to "0" upcounter Address end vector vector Address_counter_D6 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D6 to "0" upcounter Address end vector vector Address_counter_D7 set Chip_enable_bar to "0" set Output_enable_bar to "0" set Address to "00000000000" set Data_D7 to "0" upcounter Address end vector !*************************************************************** !*************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D0 compress repeat 255 times count Address_counter_D0 compress end repeat end unit unit "awaretest D1 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D1 compress repeat 255 times count Address_counter_D1 compress end repeat end unit unit "awaretest D2 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D2 compress repeat 255 times count Address_counter_D2 compress end repeat end unit unit "awaretest D3 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D3 compress repeat 255 times count Address_counter_D3 compress end repeat end unit unit "awaretest D4 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D4 compress repeat 255 times count Address_counter_D4 compress end repeat end unit unit "awaretest D5 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D5 compress repeat 255 times count Address_counter_D5 compress end repeat end unit unit "awaretest D6 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D6 compress repeat 255 times count Address_counter_D6 compress end repeat end unit unit "awaretest D7 Test" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter_D7 compress repeat 255 times count Address_counter_D7 compress end repeat end unit unit "ROM test lower" ! This unit tests the response of a ROM against a ! response learned from a known good device. preset counter Address_counter compress repeat 512 times count Address_counter compress end repeat end unit unit "ROM test upper" preset counter Address_counter_2 compress repeat 512 times count Address_counter_2 compress end repeat end unit ! End of test