!!!! 6 0 1 990714578 Vf8cf ! $Log: <@(#) A.10.00 New library.> $ !----------------------------------------------------------------------- ! Copyright (c) Hewlett-Packard Co. 1996 ! ! All Rights Reserved. Reproduction, adaptation, or translation ! without prior written permission is prohibited, except as allowed ! under the copyright laws. ! !----------------------------------------------------------------------- ! ! Device : 74abt25245nt ! Function : 25-Ohm Octal Bus Transceiver with 3-State Outputs. ! revision : B.01.00 ! safeguard : driver_asttl ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." ! ! Manufacturer : TI ! Package : 24 pin DIP ! Test Platform : HP3070 ! !----------------------------------------------------------------------- ! ! Additional Information. ! ! 1. Chip Marking: ! ! TI 307039S ! 74ABT25245NT ! ! 2. Ordering Information: ! Part Number Package ! ! SN74ABT25245 24-Pin DIP Package !------------------------------------------------------------------------------ sequential vector cycle 500n receive delay 400n assign VCC to pins 21, 16 assign GND to pins 11, 8, 5, 2 assign DIR_I to pins 24 assign OEbar_I to pins 13 assign A8_1_B to pins 12, 10, 9, 7, 6, 4, 3, 1 assign A1_B to pins 1 !AT Added for minimum pin test. assign A2_B to pins 3 !AT Added for minimum pin test. assign A3_B to pins 4 !AT Added for minimum pin test. assign A4_B to pins 6 !AT Added for minimum pin test. assign A5_B to pins 7 !AT Added for minimum pin test. assign A6_B to pins 9 !AT Added for minimum pin test. assign A7_B to pins 10 !AT Added for minimum pin test. assign A8_B to pins 12 !AT Added for minimum pin test. assign B8_1_B to pins 14, 15, 17, 18, 19, 20, 22, 23 assign B1_B to pins 23 !AT Added for minimum pin test. assign B2_B to pins 22 !AT Added for minimum pin test. assign B3_B to pins 20 !AT Added for minimum pin test. assign B4_B to pins 19 !AT Added for minimum pin test. assign B5_B to pins 18 !AT Added for minimum pin test. assign B6_B to pins 17 !AT Added for minimum pin test. assign B7_B to pins 15 !AT Added for minimum pin test. assign B8_B to pins 14 !AT Added for minimum pin test. family TTL format hexadecimal A8_1_B, B8_1_B power VCC, GND inputs DIR_I, OEbar_I bidirectional A8_1_B, B8_1_B bidirectional A1_B, A2_B, A3_B, A4_B !AT Added for minimum pin test. bidirectional A5_B, A6_B, A7_B, A8_B !AT Added for minimum pin test. bidirectional B1_B, B2_B, B3_B, B4_B !AT Added for minimum pin test. bidirectional B5_B, B6_B, B7_B, B8_B !AT Added for minimum pin test. disable A8_1_B, B8_1_B with OEbar_I to "1" disable A8_1_B with DIR_I to "1" disable B8_1_B with DIR_I to "0" ! !----------------------------------------------------------------------- ! vector Initialize_Inputs receive A8_1_B drive B8_1_B set A8_1_B to "xx" set B8_1_B to "00" set DIR_I to "0" set OEbar_I to "1" end vector vector Keep receive A8_1_B drive B8_1_B set A8_1_B to "xx" set B8_1_B to "kk" set DIR_I to "k" set OEbar_I to "k" end vector vector AtoB_55 initialize to Keep drive A8_1_B receive B8_1_B set DIR_I to "1" set OEbar_I to "0" set A8_1_B to "55" set B8_1_B to "55" end vector vector AtoB_AA initialize to Keep drive A8_1_B receive B8_1_B set DIR_I to "1" set OEbar_I to "0" set A8_1_B to "AA" set B8_1_B to "AA" end vector vector BtoA_55 initialize to Keep drive B8_1_B receive A8_1_B set DIR_I to "0" set OEbar_I to "0" set B8_1_B to "55" set A8_1_B to "55" end vector vector BtoA_AA initialize to Keep drive B8_1_B receive A8_1_B set DIR_I to "0" set OEbar_I to "0" set B8_1_B to "AA" set A8_1_B to "AA" end vector vector AtoB_55_disabled initialize to Keep drive A8_1_B receive B8_1_B set DIR_I to "1" set OEbar_I to "1" set A8_1_B to "55" set B8_1_B to "55" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Initialize_Inputs_A1B1 receive A1_B drive B1_B set A1_B to "x" set B1_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A2B2 receive A2_B drive B2_B set A2_B to "x" set B2_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A3B3 receive A3_B drive B3_B set A3_B to "x" set B3_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A4B4 receive A4_B drive B4_B set A4_B to "x" set B4_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A5B5 receive A5_B drive B5_B set A5_B to "x" set B5_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A6B6 receive A6_B drive B6_B set A6_B to "x" set B6_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A7B7 receive A7_B drive B7_B set A7_B to "x" set B7_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Initialize_Inputs_A8B8 receive A8_B drive B8_B set A8_B to "x" set B8_B to "0" set DIR_I to "0" set OEbar_I to "1" end vector vector Keep_A1B1 receive A1_B drive B1_B set A1_B to "x" set B1_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A2B2 receive A2_B drive B2_B set A2_B to "x" set B2_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A3B3 receive A3_B drive B3_B set A3_B to "x" set B3_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A4B4 receive A4_B drive B4_B set A4_B to "x" set B4_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A5B5 receive A5_B drive B5_B set A5_B to "x" set B5_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A6B6 receive A6_B drive B6_B set A6_B to "x" set B6_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A7B7 receive A7_B drive B7_B set A7_B to "x" set B7_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector Keep_A8B8 receive A8_B drive B8_B set A8_B to "x" set B8_B to "k" set DIR_I to "k" set OEbar_I to "k" end vector vector A1toB1_1 initialize to Keep_A1B1 drive A1_B receive B1_B set DIR_I to "1" set OEbar_I to "0" set A1_B to "1" set B1_B to "1" end vector vector A1toB1_0 initialize to Keep_A1B1 drive A1_B receive B1_B set DIR_I to "1" set OEbar_I to "0" set A1_B to "0" set B1_B to "0" end vector vector A2toB2_1 initialize to Keep_A2B2 drive A2_B receive B2_B set DIR_I to "1" set OEbar_I to "0" set A2_B to "1" set B2_B to "1" end vector vector A2toB2_0 initialize to Keep_A2B2 drive A2_B receive B2_B set DIR_I to "1" set OEbar_I to "0" set A2_B to "0" set B2_B to "0" end vector vector A3toB3_1 initialize to Keep_A3B3 drive A3_B receive B3_B set DIR_I to "1" set OEbar_I to "0" set A3_B to "1" set B3_B to "1" end vector vector A3toB3_0 initialize to Keep_A3B3 drive A3_B receive B3_B set DIR_I to "1" set OEbar_I to "0" set A3_B to "0" set B3_B to "0" end vector vector A4toB4_1 initialize to Keep_A4B4 drive A4_B receive B4_B set DIR_I to "1" set OEbar_I to "0" set A4_B to "1" set B4_B to "1" end vector vector A4toB4_0 initialize to Keep_A4B4 drive A4_B receive B4_B set DIR_I to "1" set OEbar_I to "0" set A4_B to "0" set B4_B to "0" end vector vector A5toB5_1 initialize to Keep_A5B5 drive A5_B receive B5_B set DIR_I to "1" set OEbar_I to "0" set A5_B to "1" set B5_B to "1" end vector vector A5toB5_0 initialize to Keep_A5B5 drive A5_B receive B5_B set DIR_I to "1" set OEbar_I to "0" set A5_B to "0" set B5_B to "0" end vector vector A6toB6_1 initialize to Keep_A6B6 drive A6_B receive B6_B set DIR_I to "1" set OEbar_I to "0" set A6_B to "1" set B6_B to "1" end vector vector A6toB6_0 initialize to Keep_A6B6 drive A6_B receive B6_B set DIR_I to "1" set OEbar_I to "0" set A6_B to "0" set B6_B to "0" end vector vector A7toB7_1 initialize to Keep_A7B7 drive A7_B receive B7_B set DIR_I to "1" set OEbar_I to "0" set A7_B to "1" set B7_B to "1" end vector vector A7toB7_0 initialize to Keep_A7B7 drive A7_B receive B7_B set DIR_I to "1" set OEbar_I to "0" set A7_B to "0" set B7_B to "0" end vector vector A8toB8_1 initialize to Keep_A8B8 drive A8_B receive B8_B set DIR_I to "1" set OEbar_I to "0" set A8_B to "1" set B8_B to "1" end vector vector A8toB8_0 initialize to Keep_A8B8 drive A8_B receive B8_B set DIR_I to "1" set OEbar_I to "0" set A8_B to "0" set B8_B to "0" end vector vector B1toA1_1 initialize to Keep_A1B1 drive B1_B receive A1_B set DIR_I to "0" set OEbar_I to "0" set B1_B to "1" set A1_B to "1" end vector vector B1toA1_0 initialize to Keep_A1B1 drive B1_B receive A1_B set DIR_I to "0" set OEbar_I to "0" set B1_B to "0" set A1_B to "0" end vector vector B2toA2_1 initialize to Keep_A2B2 drive B2_B receive A2_B set DIR_I to "0" set OEbar_I to "0" set B2_B to "1" set A2_B to "1" end vector vector B2toA2_0 initialize to Keep_A2B2 drive B2_B receive A2_B set DIR_I to "0" set OEbar_I to "0" set B2_B to "0" set A2_B to "0" end vector vector B3toA3_1 initialize to Keep_A3B3 drive B3_B receive A3_B set DIR_I to "0" set OEbar_I to "0" set B3_B to "1" set A3_B to "1" end vector vector B3toA3_0 initialize to Keep_A3B3 drive B3_B receive A3_B set DIR_I to "0" set OEbar_I to "0" set B3_B to "0" set A3_B to "0" end vector vector B4toA4_1 initialize to Keep_A4B4 drive B4_B receive A4_B set DIR_I to "0" set OEbar_I to "0" set B4_B to "1" set A4_B to "1" end vector vector B4toA4_0 initialize to Keep_A4B4 drive B4_B receive A4_B set DIR_I to "0" set OEbar_I to "0" set B4_B to "0" set A4_B to "0" end vector vector B5toA5_1 initialize to Keep_A5B5 drive B5_B receive A5_B set DIR_I to "0" set OEbar_I to "0" set B5_B to "1" set A5_B to "1" end vector vector B5toA5_0 initialize to Keep_A5B5 drive B5_B receive A5_B set DIR_I to "0" set OEbar_I to "0" set B5_B to "0" set A5_B to "0" end vector vector B6toA6_1 initialize to Keep_A6B6 drive B6_B receive A6_B set DIR_I to "0" set OEbar_I to "0" set B6_B to "1" set A6_B to "1" end vector vector B6toA6_0 initialize to Keep_A6B6 drive B6_B receive A6_B set DIR_I to "0" set OEbar_I to "0" set B6_B to "0" set A6_B to "0" end vector vector B7toA7_1 initialize to Keep_A7B7 drive B7_B receive A7_B set DIR_I to "0" set OEbar_I to "0" set B7_B to "1" set A7_B to "1" end vector vector B7toA7_0 initialize to Keep_A7B7 drive B7_B receive A7_B set DIR_I to "0" set OEbar_I to "0" set B7_B to "0" set A7_B to "0" end vector vector B8toA8_1 initialize to Keep_A8B8 drive B8_B receive A8_B set DIR_I to "0" set OEbar_I to "0" set B8_B to "1" set A8_B to "1" end vector vector B8toA8_0 initialize to Keep_A8B8 drive B8_B receive A8_B set DIR_I to "0" set OEbar_I to "0" set B8_B to "0" set A8_B to "0" end vector ! !----------------------------------------------------------------------- ! !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with A1. unit "awaretest A1 to B1 Test" execute Initialize_Inputs_A1B1 execute A1toB1_0 execute A1toB1_1 end unit unit "awaretest A2 to B2 Test" execute Initialize_Inputs_A2B2 execute A2toB2_0 execute A2toB2_1 end unit unit "awaretest A3 to B3 Test" execute Initialize_Inputs_A3B3 execute A3toB3_0 execute A3toB3_1 end unit unit "awaretest A4 to B4 Test" execute Initialize_Inputs_A4B4 execute A4toB4_0 execute A4toB4_1 end unit unit "awaretest A5 to B5 Test" execute Initialize_Inputs_A5B5 execute A5toB5_0 execute A5toB5_1 end unit unit "awaretest A6 to B6 Test" execute Initialize_Inputs_A6B6 execute A6toB6_0 execute A6toB6_1 end unit unit "awaretest A7 to B7 Test" execute Initialize_Inputs_A7B7 execute A7toB7_0 execute A7toB7_1 end unit unit "awaretest A8 to B8 Test" execute Initialize_Inputs_A8B8 execute A8toB8_0 execute A8toB8_1 end unit unit "awaretest B1 to A1 Test" execute Initialize_Inputs_A1B1 execute B1toA1_0 execute B1toA1_1 end unit unit "awaretest B2 to A2 Test" execute Initialize_Inputs_A2B2 execute B2toA2_0 execute B2toA2_1 end unit unit "awaretest B3 to A3 Test" execute Initialize_Inputs_A3B3 execute B3toA3_0 execute B3toA3_1 end unit unit "awaretest B4 to A4 Test" execute Initialize_Inputs_A4B4 execute B4toA4_0 execute B4toA4_1 end unit unit "awaretest B5 to A5 Test" execute Initialize_Inputs_A5B5 execute B5toA5_0 execute B5toA5_1 end unit unit "awaretest B6 to A6 Test" execute Initialize_Inputs_A6B6 execute B6toA6_0 execute B6toA6_1 end unit unit "awaretest B7 to A7 Test" execute Initialize_Inputs_A7B7 execute B7toA7_0 execute B7toA7_1 end unit unit "awaretest B8 to A8 Test" execute Initialize_Inputs_A8B8 execute B8toA8_0 execute B8toA8_1 end unit unit " Test1 : Tests A8_1, B8_1 as inputs & also ouputs; Tests DIR & OE" ! In this unit OE is tested for stuck high only. execute Initialize_Inputs ! Select A data to B bus with DIR=1 making A bus as input & B bus as output; ! Enable Outputs with OE=0; Drive data 55h on A bus and receive 55h on B bus. execute AtoB_55 ! Select A data to B bus with DIR=1 making A bus as input & B bus as output; ! Enable Outputs with OE=0; Drive data AAh on A bus and receive AAh on B bus. execute AtoB_AA ! Select B data to A bus with DIR=0 making B bus as input & A bus as output; ! Enable Outputs with OE=0; Drive data 55h on B bus and receive 55h on A bus. execute BtoA_55 ! Select B data to A bus with DIR=0 making B bus as input & A bus as output; ! Enable Outputs with OE=0; Drive data AAh on B bus and receive AAh on A bus. execute BtoA_AA end unit !------------------------------------------------------------------------------ unit disable test " Test2 : Tests OE for stuck low " execute Initialize_Inputs ! Select A data to B bus with DIR=1 making A bus as input & B bus as output; ! Disable Outputs with OE=1; Drive data 55h on A bus and receive 55h on B bus. ! Since this unit is a disable test it passes when this vector fails and fails ! when this vector passes. execute AtoB_55_disabled end unit ! ! End of test !