!!!! 6 0 1 990118426 Vda58 ! Device : 2364 ! Function : ROM 3-State 8K x 8 ! revision : B.01.00 ! safeguard : med_out_mos ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." warning "This test was written for the Signetics '2364', a 28-pin" warning "ROM with four chip selects. '2364' ROMs from other manu-" warning "facturers may have different enable functions, and some" warning "are 24-pin devices. This test must be modified by the" warning "user for testing '2364' ROMs with different pin-outs." warning "" vector cycle 800n receive delay 700n ! ! Note: These values of vector cycle time and receive delay are ! required for 450ns parts; they may be decreased for parts ! with faster access times. assign VCC to pins 28 assign GND to pins 14 assign NC to pins 1 assign Address to pins 2,23,21,24,25,3,4,5,6,7,8,9,10 assign Data to pins 19,18,17,16,15,13,12,11 assign Data_D0 to pins 11 !AT Added for minimum pin test. assign Data_D1 to pins 12 !AT Added for minimum pin test. assign Data_D2 to pins 13 !AT Added for minimum pin test. assign Data_D3 to pins 15 !AT Added for minimum pin test. assign Data_D4 to pins 16 !AT Added for minimum pin test. assign Data_D5 to pins 17 !AT Added for minimum pin test. assign Data_D6 to pins 18 !AT Added for minimum pin test. assign Data_D7 to pins 19 !AT Added for minimum pin test. assign Chip_selects to pins 26,27,22,20 ! S4,S3,S2,S1 ! warning "Since chip selects for this part are mask programmable," warning "this test may require modification. All four chip select" warning "inputs have been assumed to be programmed low-true." family TTL power VCC, GND inputs Address, Chip_selects outputs Data outputs Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test. outputs Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test. nondigital NC ! Note: Disable and backtrace statements may have to be modified ! according to how the select inputs have been programmed. ! when Chip_selects is "xxx1" inactive Data when Chip_selects is "xx1x" inactive Data when Chip_selects is "x1xx" inactive Data when Chip_selects is "1xxx" inactive Data trace Data to Address,Chip_selects disable Data with Chip_selects to "xxx1" disable Data with Chip_selects to "xx1x" disable Data with Chip_selects to "x1xx" disable Data with Chip_selects to "1xxx" !**************************************************************************** !**************************************************************************** vector Lower_Address_Counter set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data to "00000000" upcounter Address end vector vector Upper_Address_Counter set Chip_selects to "0000" ! Possible modification req'd set Address to "1111111111111" set Data to "00000000" downcounter Address end vector vector Disable_1 set Chip_selects to "0001" ! Possible modification req'd set Address to "0000000000000" set Data to "11111111" end vector vector Disable_2 set Chip_selects to "0010" ! Possible modification req'd set Address to "0000000000000" set Data to "11111111" end vector vector Disable_3 set Chip_selects to "0100" ! Possible modification req'd set Address to "0000000000000" set Data to "11111111" end vector vector Disable_4 set Chip_selects to "1000" ! Possible modification req'd set Address to "0000000000000" set Data to "11111111" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector Address_Counter_D0 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D0 to "0" upcounter Address end vector vector Address_Counter_D1 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D1 to "0" upcounter Address end vector vector Address_Counter_D2 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D2 to "0" upcounter Address end vector vector Address_Counter_D3 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D3 to "0" upcounter Address end vector vector Address_Counter_D4 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D4 to "0" upcounter Address end vector vector Address_Counter_D5 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D5 to "0" upcounter Address end vector vector Address_Counter_D6 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D6 to "0" upcounter Address end vector vector Address_Counter_D7 set Chip_selects to "0000" ! Possible modification req'd set Address to "0000000000000" set Data_D7 to "0" upcounter Address end vector !**************************************************************************** !**************************************************************************** !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D0. unit "awaretest D0 Test" preset counter Address_Counter_D0 compress repeat 255 times count Address_Counter_D0 compress end repeat end unit unit "awaretest D1 Test" preset counter Address_Counter_D1 compress repeat 255 times count Address_Counter_D1 compress end repeat end unit unit "awaretest D2 Test" preset counter Address_Counter_D2 compress repeat 255 times count Address_Counter_D2 compress end repeat end unit unit "awaretest D3 Test" preset counter Address_Counter_D3 compress repeat 255 times count Address_Counter_D3 compress end repeat end unit unit "awaretest D4 Test" preset counter Address_Counter_D4 compress repeat 255 times count Address_Counter_D4 compress end repeat end unit unit "awaretest D5 Test" preset counter Address_Counter_D5 compress repeat 255 times count Address_Counter_D5 compress end repeat end unit unit "awaretest D6 Test" preset counter Address_Counter_D6 compress repeat 255 times count Address_Counter_D6 compress end repeat end unit unit "awaretest D7 Test" preset counter Address_Counter_D7 compress repeat 255 times count Address_Counter_D7 compress end repeat end unit ! ROM contents are partially verified by compressing the contents of the ! lower 512 words and the upper 512 words and comparing the result with ! that of a known-good board. By modifying the loop counters, more of the ! ROM can be tested, at the expense of greater test time. unit "ROM Test lower" preset counter Lower_Address_Counter compress repeat 511 times count Lower_Address_Counter compress end repeat end unit unit "ROM Test upper" preset counter Upper_Address_Counter compress repeat 511 times count Upper_Address_Counter compress end repeat end unit ! The following units may be added to verify that the chip select ! inputs are not stuck true, if the following conditions exist: ! 1) The data bus has pull-up resistors on the board or fixture; ! 2) The data in the lowest address is not all 1's. ! !unit "Disable using S1" ! execute Disable_1 !end unit ! !unit "Disable using S2" ! execute Disable_2 !end unit ! !unit "Disable using S3" ! execute Disable_3 !end unit ! !unit "Disable using S4" ! execute Disable_4 !end unit ! End of Test