!!!!    6    0    1  989956250  Vb46b                                         

! Device           : MCM68766
! Function         : EPROM, 8K x 8  tri-state outputs
! revision         : B.01.00
! safeguard        : high_out_ttl
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

! warning "Pull-ups are required to test high-impedance outputs."

vector cycle 500n
receive delay 400n

assign VCC to pins 24
!^!VSS
assign GND to pins 12

assign Address_Bus        to pins 21,18,19,22,23,1,2,3,4,5
assign Address_Bus        to pins 6,7,8
assign Data_Bus           to pins 17,16,15,14,13,11,10,9
assign Data_D0            to pins 9    !AT Added for minimum pin test.
assign Data_D1            to pins 10   !AT Added for minimum pin test.
assign Data_D2            to pins 11   !AT Added for minimum pin test.
assign Data_D3            to pins 13   !AT Added for minimum pin test.
assign Data_D4            to pins 14   !AT Added for minimum pin test.
assign Data_D5            to pins 15   !AT Added for minimum pin test.
assign Data_D6            to pins 16   !AT Added for minimum pin test.
assign Data_D7            to pins 17   !AT Added for minimum pin test.

assign Output_Enable_bar  to pins 20

family TTL

format  hexadecimal  Address_Bus, Data_Bus

power VCC,GND

inputs Address_Bus, Output_Enable_bar

outputs Data_Bus
outputs Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test.
outputs Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test.

when     Output_enable_bar    is "1"   inactive    Data_bus

trace    Data_bus    to    Address_bus,Output_Enable_bar

disable Data_Bus with Output_Enable_bar to "1"

set load on groups   Data_Bus to pull up

!**********************************************************
!**********************************************************

vector    Address_Counter
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "0000"
 upcounter Address_Bus
end vector

vector    Address_Counter_0800
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "0800"
 upcounter Address_Bus
end vector

vector    Output_Enable
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_Bus            to   "00"
end vector

vector    Output_Disabled
 set Output_Enable_bar   to   "1"
end vector

vector    Address_0000_OE_false_0
 set Output_Enable_bar   to   "1"
 set Address_Bus         to   "0000"
 set Data_Bus            to   "00"
end vector

vector    Address_0000_OE_false_1
 set Output_Enable_bar   to   "1"
 set Address_Bus         to   "0000"
 set Data_Bus            to   "FF"
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector    Output_Enable_D0
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D0             to   "0"
end vector

vector    Output_Enable_D1
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D1             to   "0"
end vector

vector    Output_Enable_D2
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D2             to   "0"
end vector

vector    Output_Enable_D3
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D3             to   "0"
end vector

vector    Output_Enable_D4
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D4             to   "0"
end vector

vector    Output_Enable_D5
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D5             to   "0"
end vector

vector    Output_Enable_D6
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D6             to   "0"
end vector

vector    Output_Enable_D7
 set Output_Enable_bar   to   "0"
 set Address_Bus         to   "kkkk"
 set Data_D7             to   "0"
end vector

!**********************************************************
!**********************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit "awaretest D0 Test"
  preset counter Address_Counter
  execute Output_Enable_D0   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D0   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D1 Test"
  preset counter Address_Counter
  execute Output_Enable_D1   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D1   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D2 Test"
  preset counter Address_Counter
  execute Output_Enable_D2   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D2   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D3 Test"
  preset counter Address_Counter
  execute Output_Enable_D3   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D3   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D4 Test"
  preset counter Address_Counter
  execute Output_Enable_D4   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D4   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D5 Test"
  preset counter Address_Counter
  execute Output_Enable_D5   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D5   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D6 Test"
  preset counter Address_Counter
  execute Output_Enable_D6   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D6   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "awaretest D7 Test"
  preset counter Address_Counter
  execute Output_Enable_D7   compress
  execute Output_Disabled
  repeat  255 times
    count Address_Counter compress
    execute Output_Enable_D7   compress
    execute Output_Disabled compress
 end repeat
end unit

! Estimated run time for first two unit is  9 ms.

unit "Address bits A0 to A12 of ROM Test"
  preset counter Address_Counter
  execute Output_Enable   compress
  execute Output_Disabled
  repeat  2047 times
    count Address_Counter compress
    execute Output_Enable   compress
    execute Output_Disabled compress
 end repeat
end unit

unit "Address bits A13  ROM Test"
  preset counter Address_Counter_0800
  execute Output_Enable   compress
  execute Output_Disabled
  repeat  2098 times
    count Address_Counter_0800 compress
    execute Output_Enable   compress
    execute Output_Disabled  compress
 end repeat
end unit

! Estimated run time for all unit is 27 ms.

!unit "Complete ROM Test"
!  preset counter Address_Counter
!  execute Output_Enable   compress
!  execute Output_Disabled
!  repeat  8191 times
!    count Address_Counter compress
!    execute Output_Enable   compress
!    execute Output_Disabled compress
! end repeat
!end unit

!  The Data_bus is tri-stated when Output_enable is false.
!  Therefore the user must select the proper unit for either
!   pullup resistor going to VCC or pulldown resistor going
!   to GND.

!  Test for OE (pin 22) SA0 with pullup resistor to VCC.
unit "Test Output_Enable false"
 execute   Address_0000_OE_false_1
end unit

!  Test for OE (pin 22) SAO with pullup resistor to GND
!unit "Test Output_Enable false"
! execute   Address_0000_OE_false_0
!end unit

! end of test