!!!! 6 0 1 990715211 V0fb8 ! Device : 8282 ! Function : OCTAL LATCH w/ non-inverted outputs ! revision : B.01.00 ! safeguard : high_out_ttl ! Modifications : Modified for AwareTest xi ! warning "This library has not been verified with hardware." sequential ! warning "Pull-ups are required to test high-impedance outputs." vector cycle 1u receive delay 900n assign VCC to pins 20 assign GND to pins 10 assign DI to pins 8,7,6,5,4,3,2,1 assign D8 to pins 8 assign D7 to pins 7 assign D6 to pins 6 assign D5 to pins 5 assign D4 to pins 4 assign D3 to pins 3 assign D2 to pins 2 assign D1 to pins 1 assign OE_Bar to pins 9 assign STB to pins 11 assign DO to pins 12,13,14,15,16,17,18,19 assign Q8 to pins 12 assign Q7 to pins 13 assign Q6 to pins 14 assign Q5 to pins 15 assign Q4 to pins 16 assign Q3 to pins 17 assign Q2 to pins 18 assign Q1 to pins 19 family TTL power VCC, GND inputs DI,OE_Bar,STB inputs D1,D2,D3,D4,D5,D6,D7,D8 !AT Added for minimum pin test. outputs DO outputs Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8 !AT Added for minimum pin test. disable DO with OE_bar to "1" when OE_bar is "1" inactive DO trace Q8 to D8, OE_Bar, STB trace Q7 to D7, OE_Bar, STB trace Q6 to D6, OE_Bar, STB trace Q5 to D5, OE_Bar, STB trace Q4 to D4, OE_Bar, STB trace Q3 to D3, OE_Bar, STB trace Q2 to D2, OE_Bar, STB trace Q1 to D1, OE_Bar, STB set load on groups DO to pull up !******************************************************************************* !******************************************************************************* vector STB_Low set STB to "0" set OE_Bar to "k" set DI to "kkkkkkkk" end vector vector STB_High set STB to "1" set OE_Bar to "k" set DI to "kkkkkkkk" end vector vector OE_Bar_High set OE_Bar to "1" set STB to "0" end vector vector OE_Bar_Low set OE_Bar to "0" set STB to "0" end vector vector DI_00000000 set DI to "00000000" set STB to "k" set OE_Bar to "k" end vector vector DI_11111111 set DI to "11111111" set STB to "k" set OE_Bar to "k" end vector vector DI_10101010 set DI to "10101010" set STB to "k" set OE_Bar to "k" end vector vector DI_01010101 set DI to "01010101" set STB to "k" set OE_Bar to "k" end vector vector DO_00000000 set DO to "00000000" end vector vector DO_11111111 set DO to "11111111" end vector vector DO_10101010 set DO to "10101010" end vector vector DO_01010101 set DO to "01010101" end vector !AT The following vectors have been added for a minimum pins test. Any !AT vectors that references the data bus was copied and modified to reference !AT only a single pin of the data bus. vector STB_High_D1 set STB to "1" set OE_Bar to "k" set D1 to "k" end vector vector STB_High_D2 set STB to "1" set OE_Bar to "k" set D2 to "k" end vector vector STB_High_D3 set STB to "1" set OE_Bar to "k" set D3 to "k" end vector vector STB_High_D4 set STB to "1" set OE_Bar to "k" set D4 to "k" end vector vector STB_High_D5 set STB to "1" set OE_Bar to "k" set D5 to "k" end vector vector STB_High_D6 set STB to "1" set OE_Bar to "k" set D6 to "k" end vector vector STB_High_D7 set STB to "1" set OE_Bar to "k" set D7 to "k" end vector vector STB_High_D8 set STB to "1" set OE_Bar to "k" set D8 to "k" end vector vector D1_0 set D1 to "0" set STB to "k" set OE_Bar to "k" end vector vector D1_1 set D1 to "1" set STB to "k" set OE_Bar to "k" end vector vector D2_0 set D2 to "0" set STB to "k" set OE_Bar to "k" end vector vector D2_1 set D2 to "1" set STB to "k" set OE_Bar to "k" end vector vector D3_0 set D3 to "0" set STB to "k" set OE_Bar to "k" end vector vector D3_1 set D3 to "1" set STB to "k" set OE_Bar to "k" end vector vector D4_0 set D4 to "0" set STB to "k" set OE_Bar to "k" end vector vector D4_1 set D4 to "1" set STB to "k" set OE_Bar to "k" end vector vector D5_0 set D5 to "0" set STB to "k" set OE_Bar to "k" end vector vector D5_1 set D5 to "1" set STB to "k" set OE_Bar to "k" end vector vector D6_0 set D6 to "0" set STB to "k" set OE_Bar to "k" end vector vector D6_1 set D6 to "1" set STB to "k" set OE_Bar to "k" end vector vector D7_0 set D7 to "0" set STB to "k" set OE_Bar to "k" end vector vector D7_1 set D7 to "1" set STB to "k" set OE_Bar to "k" end vector vector D8_0 set D8 to "0" set STB to "k" set OE_Bar to "k" end vector vector D8_1 set D8 to "1" set STB to "k" set OE_Bar to "k" end vector vector Q1_0 set Q1 to "0" end vector vector Q1_1 set Q1 to "1" end vector vector Q2_0 set Q2 to "0" end vector vector Q2_1 set Q2 to "1" end vector vector Q3_0 set Q3 to "0" end vector vector Q3_1 set Q3 to "1" end vector vector Q4_0 set Q4 to "0" end vector vector Q4_1 set Q4 to "1" end vector vector Q5_0 set Q5 to "0" end vector vector Q5_1 set Q5 to "1" end vector vector Q6_0 set Q6 to "0" end vector vector Q6_1 set Q6 to "1" end vector vector Q7_0 set Q7 to "0" end vector vector Q7_1 set Q7 to "1" end vector vector Q8_0 set Q8 to "0" end vector vector Q8_1 set Q8 to "1" end vector !******************************************************************************* sub Test_OE_Bar execute OE_Bar_High execute DI_11111111 !if outputs tied high ! execute DI_00000000 !if outputs tied low execute STB_High !latch is transparent execute DO_11111111 !if outputs tied high ! execute DO_00000000 !if outputs tied low end sub !******************************************************************************* !******************************************************************************* !AT The following AwareTest units have been added for minimum pins tests. Each !AT unit tests a separate data pin starting with D1, Q1. unit "awaretest D1, Q1 Test" execute OE_Bar_Low execute D1_0 execute STB_High_D1 execute Q1_0 execute OE_Bar_Low execute D1_1 execute STB_High_D1 execute Q1_1 end unit unit "awaretest D2, Q2 Test" execute OE_Bar_Low execute D2_0 execute STB_High_D2 execute Q2_0 execute OE_Bar_Low execute D2_1 execute STB_High_D2 execute Q2_1 end unit unit "awaretest D3, Q3 Test" execute OE_Bar_Low execute D3_0 execute STB_High_D3 execute Q3_0 execute OE_Bar_Low execute D3_1 execute STB_High_D3 execute Q3_1 end unit unit "awaretest D4, Q4 Test" execute OE_Bar_Low execute D4_0 execute STB_High_D4 execute Q4_0 execute OE_Bar_Low execute D4_1 execute STB_High_D4 execute Q4_1 end unit unit "awaretest D5, Q5 Test" execute OE_Bar_Low execute D5_0 execute STB_High_D5 execute Q5_0 execute OE_Bar_Low execute D5_1 execute STB_High_D5 execute Q5_1 end unit unit "awaretest D6, Q6 Test" execute OE_Bar_Low execute D6_0 execute STB_High_D6 execute Q6_0 execute OE_Bar_Low execute D6_1 execute STB_High_D6 execute Q6_1 end unit unit "awaretest D7, Q7 Test" execute OE_Bar_Low execute D7_0 execute STB_High_D7 execute Q7_0 execute OE_Bar_Low execute D7_1 execute STB_High_D7 execute Q7_1 end unit unit "awaretest D8, Q8 Test" execute OE_Bar_Low execute D8_0 execute STB_High_D8 execute Q8_0 execute OE_Bar_Low execute D8_1 execute STB_High_D8 execute Q8_1 end unit !Verify that outputs toggle (STB_High = transparent buffer, ! OE_Bar_Low = enable outputs ) unit "DATA_00000000" execute OE_Bar_Low !enable outputs execute DI_00000000 execute STB_High execute DO_00000000 !inverting outputs end unit unit "DATA_11111111" execute OE_Bar_Low execute DI_11111111 execute STB_High execute DO_11111111 end unit !Verify that adjacent bits are not inadvertently connected !These two units should be commented out if pins are connected in topology unit "DATA_10101010" execute OE_Bar_Low execute DI_10101010 execute STB_High execute DO_10101010 end unit unit "DATA_01010101" execute OE_Bar_Low execute DI_01010101 execute STB_High execute DO_01010101 end unit !Verify that strobe latches 0's and 1's by latching 0 (or 1) !and checking that the outputs do not change unit "Test_Latch_0" !test latching of 0's execute OE_Bar_Low execute DI_00000000 execute STB_High execute STB_Low !latch input execute DI_11111111 !change input execute DO_00000000 !correct output is result of !latched (first) input end unit unit "Test_Latch_1" !test latching of 1's execute OE_Bar_Low execute DI_11111111 execute STB_High execute STB_Low !latch input execute DI_00000000 !change input execute DO_11111111 !correct output is result of !latched (first) input end unit unit "Test_OE_Bar" !tests outputs disabled state call Test_OE_Bar end unit ! End of Test