!!!!    6    0    1  989956145  V1cdb                                         

! Device           : 27128
! Function         : uv_prom 16k x 8
! revision         : B.01.00
! safeguard        : med_out_mos
! Modifications    : Modified for AwareTest xi
!
  warning           "This library has not been verified with hardware."

sequential

vector cycle 600n
receive delay 500n

assign    VCC       to pins   28
assign    GND       to pins   14

assign    Address   to pins   26,2,23,21,24,25
assign    Address   to pins   3,4,5,6,7,8,9,10

assign    Output    to pins   19,18,17,16,15,13,12,11
assign    Data_D0   to pins   11   !AT Added for minimum pin test.
assign    Data_D1   to pins   12   !AT Added for minimum pin test.
assign    Data_D2   to pins   13   !AT Added for minimum pin test.
assign    Data_D3   to pins   15   !AT Added for minimum pin test.
assign    Data_D4   to pins   16   !AT Added for minimum pin test.
assign    Data_D5   to pins   17   !AT Added for minimum pin test.
assign    Data_D6   to pins   18   !AT Added for minimum pin test.
assign    Data_D7   to pins   19   !AT Added for minimum pin test.

assign    Chip_enable_bar     to pins   20
assign    Output_enable_bar   to pins   22
assign    Program_bar         to pins   27
assign    VPP                 to pins   1

format   hexadecimal    Address, Output

family    TTL

power     VCC, GND

inputs    Address, Chip_enable_bar, Output_enable_bar, Program_bar

outputs   Output
outputs   Data_D0, Data_D1, Data_D2, Data_D3 !AT Added for minimum pin test.
outputs   Data_D4, Data_D5, Data_D6, Data_D7 !AT Added for minimum pin test.

nondigital  VPP

disable   Output    with Chip_enable_bar     to   "1"
disable   Output    with Output_enable_bar   to   "1"

!  Backtrace data
when  Chip_enable_bar   is "1"   inactive    Output
when  Output_enable_bar is "1"   inactive    Output

trace Output   to    Address, Chip_enable_bar, Output_enable_bar
trace Output   to    Program_bar    !  Necessary???

!***************************************************************
!***************************************************************

vector  Address_Counter_A                    !  0000 to 0FFF
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Output              to   "00"
     upcounter         Address
end vector

vector  Address_Counter_B                    !  1000 to 1FFF
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "1000"
     set  Output              to   "00"
     upcounter         Address
end vector

vector  Address_Counter_C                    !  2000 to 2FFF
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "2000"
     set  Output              to   "00"
     upcounter         Address
end vector

vector  Address_Counter_D                    !  3FFF to 3000
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "3FFF"
     set  Output              to   "00"
     downcounter       Address
end vector

!AT The following vectors have been added for a minimum pins test. Any
!AT vectors that references the data bus was copied and modified to reference
!AT only a single pin of the data bus.

vector  Address_Counter_D0
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D0             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D1
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D1             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D2
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D2             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D3
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D3             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D4
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D4             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D5
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D5             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D6
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D6             to   "0"
     upcounter         Address
end vector

vector  Address_Counter_D7
     set  Program_bar         to   "1"
     set  Chip_enable_bar     to   "0"
     set  Output_enable_bar   to   "0"
     set  Address             to   "0000"
     set  Data_D7             to   "0"
     upcounter         Address
end vector

!***************************************************************
!***************************************************************

!AT The following AwareTest units have been added for minimum pins tests. Each
!AT unit tests a separate data pin starting with D0.

unit "awaretest D0 Test"
      preset counter    Address_Counter_D0    compress
      repeat  255  times
         count    Address_Counter_D0    compress
      end repeat
end unit

unit "awaretest D1 Test"
      preset counter    Address_Counter_D1    compress
      repeat  255  times
         count    Address_Counter_D1    compress
      end repeat
end unit

unit "awaretest D2 Test"
      preset counter    Address_Counter_D2    compress
      repeat  255  times
         count    Address_Counter_D2    compress
      end repeat
end unit

unit "awaretest D3 Test"
      preset counter    Address_Counter_D3    compress
      repeat  255  times
         count    Address_Counter_D3    compress
      end repeat
end unit

unit "awaretest D4 Test"
      preset counter    Address_Counter_D4    compress
      repeat  255  times
         count    Address_Counter_D4    compress
      end repeat
end unit

unit "awaretest D5 Test"
      preset counter    Address_Counter_D5    compress
      repeat  255  times
         count    Address_Counter_D5    compress
      end repeat
end unit

unit "awaretest D6 Test"
      preset counter    Address_Counter_D6    compress
      repeat  255  times
         count    Address_Counter_D6    compress
      end repeat
end unit

unit "awaretest D7 Test"
      preset counter    Address_Counter_D7    compress
      repeat  255  times
         count    Address_Counter_D7    compress
      end repeat
end unit

!  All 16,384 cells are checked using four 4,096-cell segments.
!  Each segment can be preceeded by "delay for cooling" and
!  "execute Disablevector" statements.

unit  "Test Segment A"
      preset counter    Address_Counter_A    compress
      repeat   4095  times
         count    Address_Counter_A    compress
      end repeat
end unit

unit  "Test Segment B"
!     delay for cooling
!     execute Disablevector
      preset counter    Address_Counter_B    compress
      repeat   4095  times
         count    Address_Counter_B    compress
      end repeat
end unit

unit  "Test Segment C"
!     delay for cooling
!     execute Disablevector
      preset counter    Address_Counter_C    compress
      repeat   4095  times
         count    Address_Counter_C    compress
      end repeat
end unit

unit  "Test Segment D"
!     delay for cooling
!     execute Disablevector
      preset counter    Address_Counter_D    compress
      repeat   4095  times
         count    Address_Counter_D    compress
      end repeat
end unit

!    End of test