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x1149 边界扫描测试分析仪特点

x1149 边界扫描测试分析仪――功能丰富、易于使用的电路板测试工具

x1149 是工程师在执行结构测试（例如对 PCBA 执行开路和短路测试）时使用的一种工具。 它还可以对现场可编程门阵列（FPGA）和复杂可编程逻辑器件（CPLD）等器件执行系统内编程。

此外，x1149 可对 PROM（可编程只读存储器）器件进行编程，并可对 DDR SDRAM（双倍数据速率同步动态随机存取存储器）等器件进行存储器验证测试。 这使您可以在系统中对这些器件进行编程和重新编程，在开发过程中实现更好的灵活性和控制。 凭借先进的测试功能和容易使用的软件，Keysight x1149 成为满足您所有电路板边际扫描测试需求的理想解决方案。

x1149 2.1 的特性

  • IEEE 标准
    • 1149.1-2013（新增）
    • 1149.6-2015（新增）
    • 1149.1-2001
    • 1149.6-2003
    • 1687-2014
  • 使用插入源语言（ISL）2.0 自定义测试
  • 支持 Autobank 和扫描路径链接器
  • 提供支持 1149.1 和 1149.6-2015 标准的新 BSDL 扩展
  • 提高灵活性，并可支持 1149.1 和 1149.6 标准中的 IP 数据包和可编程功能

测试开发

  • 扩大对连接器和非边界扫描 IC 的测试范围
  • 功能强大的调试工具
  • 可执行的引脚电平失效报告
  • 系统内编程

应用

  • 面向 Netcom、服务器产品和汽车客户的广泛测试范围
  • 用于电路板测试和嵌入式仪器测试的 IEEE 1687 解决方案
  • 自动配置扫描路径链接器

主要技术指标

下载技术资料
CET Ports
1
外观因素
n/a
Remote Test Configurability
是
System Width
120 mm
TAP IO Ports
4
类型
Benchtop
CET Ports
外观因素
Remote Test Configurability
System Width
TAP IO Ports
类型
1
n/a
是
120 mm
4
Benchtop
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CET Ports:
1
外观因素 :
n/a
Remote Test Configurability:
是
System Width:
120 mm
TAP IO Ports:
4
类型:
Benchtop

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M6800B
M6800B x1149 Development License 
起价  
This tool is designed for test development purposes before sending to production for runtime usage. It provides a comprehensive scope of test development features, including configuration, data preparation, test generation, fixture generation, and debugging.
M6801B
M6801B x1149 Runtime License Bundle 
起价  
Run time license for Boundary Scan Analyzer provides a comprehensive testing solution that is fully compliant with the latest IEEE 1149.1-2013 standard. This license is designed specifically for production runtime testing.
M6802B
M6802B x1149 IEEE1687 Development Feature License 
起价  
Provide the capability to test the functionality of embedded instruments within a semiconductor device without defining the instruments or their features.
M6803B
M6803B x1149 IEEE1687 Development Feature License 
起价  
Provide the capability to test the functionality of embedded instruments within a semiconductor device without defining the instruments or their features.
M6804B
M6804B x1149 Result Analyzer Feature License 
起价  
Result Analyzer is a tool that analyses raw test results to pinpoint the exact device pin location that caused a test failure.
M6806B
M6806B x1149 Software Version 2.0 Upgrade Plan (Runtime & Test Development) 
起价  
Software Version 2.0 Upgrade Plan for runtime and test development is a service that allows the user to get the latest software revisions for their Keysight x1149 Boundary Scan Analyzer.
M6808B
M6808B x1149 SW License, SVF Export 
起价  
Enable the import of external source files to program CPLD/FPGA devices.
M6813B
M6813B x1149 Software Version 2.0 Upgrade Plan (Runtime only) 
起价  
Software Version 2.0 Upgrade Plan for runtime is a service that allows the user to get the latest software revisions for their Keysight x1149 Boundary Scan Analyzer.
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Keysight x1149 2.1 边界扫描测试分析仪的新增功能特性

遵循 IEEE 1149.1-2013 新标准提供以下边际扫描测试功能，测试范围将扩大 75% 左右：

  • 寄存器助记符
  • IC 复位控制
  • 元器件初始化机制
  • 分段边界扫描寄存器
  • 电源域支持
  • 测试模式持续性
  • 电子芯片识别（ECID）
  • 程序描述语言（PDL）

现在，我们在 2.1 版本中添加了符合 IEEE 1149.6-2015 标准的测试。

IEEE 1149.6-2015 是 1149.6 标准的最新版本。 这个 1149.6 版本主要对超高速（1+Gb/s）数字数据路径上的增强型交流耦合电容器检测和差分互连做出了规定。 标准中涉及的测试类型包括互连点 6、总线点 6 和短路电容点 6。

符合 IEEE 1149.1-2013 和 1149.6-2015 标准有助于：

  • 节省电路板和系统测试成本。
  • 以高度自动化的方式和高诊断分辨率进行测试准备、执行和解释。
  • 促进来自不同供应商、特性和参数各不相同的器件在测试过程中协同运行。
Keysight x1149 2.0

扩展 x1149 边界扫描分析仪的功能

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关于 x1149 边界扫描分析仪的特色资源

Application Notes 2023.08.01

Enhancing Efficiency in Server Board Testing with x1149 Boundary Scan Analyzer 2.0

Enhancing Efficiency in Server Board Testing with x1149 Boundary Scan Analyzer 2.0

This application note will delve into the capabilities of x1149 Boundary Scan Analyzer 2.0 for server board chipset testing, which poses various challenges, such as complex interconnects, limited access points, and increasing component density. This paper also aims to showcase how x1149 effectively addresses these challenges and ensures accurate and reliable testing of chipsets.

2023.08.01

Data Sheets 2023.08.15

x1149 Boundary Scan Analyzer

x1149 Boundary Scan Analyzer

The Keysight x1149 is a comprehensive and versatile board test solution that provides everything you need to efficiently test and analyze circuit boards during every stage of the development process. Whether you're in the research and development phase or preparing for production, the Keysight x1149 makes it easy to design, analyze, and test your circuit boards with its coherent software interface.

2023.08.15

Case Studies 2022.07.22

X1149 Brings Faster Testing for Server Boards

X1149 Brings Faster Testing for Server Boards

ICT (In-Circuit Testing) is well-known for its ability to provide a quick and comprehensive analysis of the PCBA's components and interconnectivity. However, ICT alone may not be sufficient because high-speed PCBA testing may necessitate a different approach. In this case study, we demonstrate how we assisted one of the world's largest original design manufacturers (ODMs) in improving the test process for their high-speed PCBA products.

2022.07.22

Application Notes 2014.08.03

Merging Boards on Keysight x1149 Boundary Scan Analyzer

Merging Boards on Keysight x1149 Boundary Scan Analyzer

This application note shows how to connect two or more boards to form a single boundary scan chain using the Keysight x1149 boundary scan analyzer.

2014.08.03

Technical Overviews 2017.08.14

x1149 Pin Constraints Feature

x1149 Pin Constraints Feature

This overview describes how the pin constraints feature can improve boundary scan test coverage and perform debugging, eliminating manual BSDL file editing and test regeneration.

2017.08.14

Application Notes 2014.08.03

Releasing the "Test Sequence" and "Test" to Production on the Boundary Scan Analyzer

Releasing the "Test Sequence" and "Test" to Production on the Boundary Scan Analyzer

This paper describes how to release test sequences and tests to production when using the Keysight x1149 Boundary Scan Analyzer. Learn more.

2014.08.03

Application Notes 2014.08.03

Modifying DDR Libraries for Silicon Nail Test Generation

Modifying DDR Libraries for Silicon Nail Test Generation

Find how to modify DDR libraries for silicon nail test generation on the Keysight x1149 boundary scan analyzer. Explore the nail test generation procedures!

2014.08.03

Application Notes 2015.05.26

Implementing Cover-Extend Test on Boundary Scan Analyzers

Implementing Cover-Extend Test on Boundary Scan Analyzers

Understand the generation process of cover-extend testing, a fixturing design for CET implementation on x1149 boundary scan analyzers. Learn more!

2015.05.26

Application Notes 2015.10.30

Configuring Lattice BSCAN2 Scan Path Linker

Configuring Lattice BSCAN2 Scan Path Linker

Learn how to configure lattice BSCAN2 scan path linkers with a boundary scan linker mux device from Keysight.

2015.10.30

应用指南 2021.10.20

边界扫描针对扫描链完整性和测试覆盖率的DFT指南

边界扫描针对扫描链完整性和测试覆盖率的DFT指南

这篇文章解释边界扫描和探讨DFT指南对于扫描链完整性和测试覆盖率的提升。

2021.10.20

Application Notes 2017.12.01

x1149 Boundary Scan Solution for Blade Server Board

x1149 Boundary Scan Solution for Blade Server Board

Keysight’s x1149 offers great flexibility for boundary scan. See how the multi-chain feature helps you achieve boundary scan interconnection easily.

2017.12.01

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